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Jef L. van Meerbergen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Peter Poplavko, Twan Basten, Marco Bekooij, Jef L. van Meerbergen, Bart Mesman
    Task-level timing models for guaranteed performance in multiprocessor networks-on-chip. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:63-72 [Conf]
  2. Adwin H. Timmer, Marino T. J. Strik, Jef L. van Meerbergen, Jochen A. G. Jess
    Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:593-598 [Conf]
  3. John Dielissen, Jef L. van Meerbergen, Marco Bekooij, Françoise Harmsze, Sergej Sawitzki, Jos Huisken, Albert van der Werf
    Power-efficient layered turbo decoder processor. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:246-251 [Conf]
  4. Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeters, Jef L. van Meerbergen
    Networks on Silicon: Combining Best-Effort and Guaranteed Services. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:423-427 [Conf]
  5. Françoise Harmsze, Adwin H. Timmer, Jef L. van Meerbergen
    Memory Arbitration and Cache Management in Stream-Based Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:257-262 [Conf]
  6. Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess
    Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:125-131 [Conf]
  7. Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess
    A Constraint Driven Approach to Loop Pipelining and Register Binding. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:377-383 [Conf]
  8. Marc Quax, Jos Huisken, Jef L. van Meerbergen
    A Scalable Implementation of a Reconfigurable WCDMA Rake Receiver. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:230-235 [Conf]
  9. Edwin Rijpkema, Kees G. W. Goossens, Andrei Radulescu, John Dielissen, Jef L. van Meerbergen, Paul Wielage, E. Waterlander
    Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10350-10355 [Conf]
  10. Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. van Meerbergen, Yajun Ha
    Global Analysis of Resource Arbitration for MPSoC. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:71-78 [Conf]
  11. Douglas M. Grant, Jef L. van Meerbergen, Paul E. R. Lippens
    Optimization of Address Generator Hardware. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:325-329 [Conf]
  12. Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf
    Multidimensional Periodic Scheduling Model and Complexity. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:226-235 [Conf]
  13. Katarzyna Leijten-Nowak, Jef L. van Meerbergen
    An FPGA architecture with enhanced datapath functionality. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:195-204 [Conf]
  14. Bernardo Kastrup, Jef L. van Meerbergen, Katarzyna Nowak
    Seeking (the right) Problems for the Solutions of Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
    FPL, 1999, pp:520-525 [Conf]
  15. Bernardo Kastrup, Jeroen Trum, Orlando Moreira, Jan Hoogerbrugge, Jef L. van Meerbergen
    Compiling Applications for ConCISe: An Example of Automatic HW/SW Partitioning and Synthesis. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:695-706 [Conf]
  16. Katarzyna Leijten-Nowak, Jef L. van Meerbergen
    Embedded Reconfigurable Logic Core for DSP Applications. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:89-101 [Conf]
  17. Paul E. R. Lippens, Jef L. van Meerbergen, Wim F. J. Verhaegh, Albert van der Werf
    Allocation of multiport memories for hierarchical data stream. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:728-735 [Conf]
  18. Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Albert van der Werf, Jef L. van Meerbergen
    Efficiency improvements for force-directed scheduling. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:286-291 [Conf]
  19. Albert van der Werf, M. J. H. Peek, Emile H. L. Aarts, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh
    Area optimization of multi-functional processing units. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:292-299 [Conf]
  20. Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess
    PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:164-169 [Conf]
  21. Aleksandar Beric, Gerard de Haan, Jef L. van Meerbergen, Ramanathan Sethuraman
    Towards an efficient high quality picture-rate up-converter. [Citation Graph (0, 0)][DBLP]
    ICIP (2), 2003, pp:363-366 [Conf]
  22. Aleksandar Beric, Gerard de Haan, Jef L. van Meerbergen, Ramanathan Sethuraman
    Algorithm/architecture co-design of the generalized sampling theorem based de-interlacer [video signal processing]. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2943-2946 [Conf]
  23. Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess
    Constraint Analysis for DSP Code Generation. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:33-40 [Conf]
  24. Marco Bekooij, Jochen A. G. Jess, Jef L. van Meerbergen
    Phase coupled operation assignment for VLIW processors with distributed register files. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:118-123 [Conf]
  25. Peter Poplavko, Twan Basten, Milan Pastrnak, Jef L. van Meerbergen, Marco Bekooij, Peter H. N. de With
    Extended abstract: estimation times of on-chip multiprocessor stream-oriented applications. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2005, pp:250-251 [Conf]
  26. Sias Mostert, Nathalie Cossement, Rudy Lauwereins, Jef L. van Meerbergen
    DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2001, pp:122-127 [Conf]
  27. Orlando Moreira, Jan-David Mol, Marco Bekooij, Jef L. van Meerbergen
    Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:332-341 [Conf]
  28. Marco Bekooij, Jef L. van Meerbergen, Sonali Parma
    Performance Guarantees by Simulation of Process Networks. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2005, pp:10-19 [Conf]
  29. Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman, Milan Pastrnak, Jef L. van Meerbergen
    Predictable Embedded Multiprocessor System Design. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2004, pp:77-91 [Conf]
  30. Albert van der Werf, Emile H. L. Aarts, E. W. Heijnen, Jef L. van Meerbergen, Wim F. J. Verhaegh, Paul E. R. Lippens
    A new method for retiming multi-functional processing units. [Citation Graph (0, 0)][DBLP]
    VLSI, 1993, pp:191-200 [Conf]
  31. Albert van der Werf, B. T. McSweeney, Jef L. van Meerbergen, Paul E. R. Lippens, W. F. J. Verhaeg
    Hierarchical Retiming Including Pipelining. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:451-460 [Conf]
  32. Aleksandar Beric, Ramanathan Sethuraman, Jef L. van Meerbergen, Gerard de Haan
    Memory-Centric Motion Estimator. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:816-819 [Conf]
  33. Aleksandar Beric, Ramanathan Sethuraman, Harm Peters, Jef L. van Meerbergen, Gerard de Haan, Carlos A. Alba Pinto
    A 27 mW 1.1 mm2 Motion Estimator for Picture-Rate Up-converter. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:1083-0 [Conf]
  34. Aleksandar Beric, Ramanathan Sethuraman, Harm Peters, Gerard Veldman, Jef L. van Meerbergen, Gerard de Haan
    Streaming scratchpad memory organization for video applications. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2004, pp:427-432 [Conf]
  35. Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf
    The Complexity of Multidimensional Periodic Scheduling. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 1998, v:89, n:1-3, pp:213-242 [Journal]
  36. Bart Mesman, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess
    Constraint analysis for DSP code generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:1, pp:44-57 [Journal]
  37. Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Jef L. van Meerbergen, Albert van der Werf
    Improved force-directed scheduling in high-throughput digital signal processing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:8, pp:945-960 [Journal]
  38. Harm Peters, Ramanathan Sethuraman, Aleksandar Beric, P. Meuwissen, Srinivasan Balakrishnan, Carlos A. Alba Pinto, W. M. Kruijtzer, F. Ernst, G. Alkadi, Jef L. van Meerbergen, Gerard de Haan
    Application Specific Instruction-Set Processor Template for Motion Estimation in Video Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:4, pp:508-527 [Journal]
  39. Koen van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess
    Constraint analysis for code generation: basic techniques and applications in FACTS. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:4, pp:774-793 [Journal]
  40. Calin Ciordas, Twan Basten, Andrei Radulescu, Kees Goossens, Jef L. van Meerbergen
    An event-based monitoring service for networks on chip. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:4, pp:702-723 [Journal]
  41. Milan Pastrnak, Peter H. N. de With, Jef L. van Meerbergen
    Realization of QoS management using negotiation algorithms for multiprocessor NoC. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  42. Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovic, Qin Zhao, Frank Bouwens, Jef L. van Meerbergen
    Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:385-395 [Conf]
  43. Chris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen
    Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:80-85 [Conf]

  44. PROPHID: a data-driven multi-processor architecture for high-performance DSP. [Citation Graph (, )][DBLP]


  45. Cache Aware Mapping of Streaming Applications on a Multiprocessor System-on-Chip. [Citation Graph (, )][DBLP]


  46. Multidimensional periodic scheduling: a solution approach. [Citation Graph (, )][DBLP]


  47. Decoupling of Computation and Communication with a Communication Assist. [Citation Graph (, )][DBLP]


  48. Execution-time Prediction for Dynamic Streaming Applications with Task-level Parallelism. [Citation Graph (, )][DBLP]


  49. Synthesis of delay functions in DSP compilers. [Citation Graph (, )][DBLP]


  50. Open-ended system for high-level synthesis of flexible signal processors. [Citation Graph (, )][DBLP]


  51. Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP. [Citation Graph (, )][DBLP]


  52. Practical and Accurate Throughput Analysis with the Cyclo Static Dataflow Model. [Citation Graph (, )][DBLP]


  53. Efficient buffer capacity and scheduler setting computation for soft real-time stream processing applications. [Citation Graph (, )][DBLP]


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