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David J. Lilja: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. David J. Lilja
    Cache Coherence in Large-Scale Shared-Memory Multiprocessors: Issues and Comparisons. [Citation Graph (2, 0)][DBLP]
    ACM Comput. Surv., 1993, v:25, n:3, pp:303-338 [Journal]
  2. Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal
    Trends in Shared Memory Multiprocessing. [Citation Graph (1, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:12, pp:44-50 [Journal]
  3. Jian Huang, David J. Lilja
    Exploring Sub-Block Value Reuse for Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:100-110 [Conf]
  4. Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan
    Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:88-101 [Conf]
  5. Bob Glamm, David J. Lilja
    Automatic Verification of Instruction Set Simulation Using Synchronized State Comparison. [Citation Graph (0, 0)][DBLP]
    Annual Simulation Symposium, 2001, pp:72-77 [Conf]
  6. Ying Chen, Dennis Abts, David J. Lilja
    Efficiently generating test vectors with state pruning. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1196-1199 [Conf]
  7. Haowei Bai, Mohammed Atiquzzaman, David J. Lilja
    Wireless Sensor Network for Aircraft Health Monitoring. [Citation Graph (0, 0)][DBLP]
    BROADNETS, 2004, pp:748-750 [Conf]
  8. JunSeong Kim, David J. Lilja
    Characterization of Communication Patterns in Message-Passing Parallel Scientific Application Programs. [Citation Graph (0, 0)][DBLP]
    CANPC, 1998, pp:202-216 [Conf]
  9. Keqiang Wu, Peng-fei Chuang, David J. Lilja
    An active data-aware cache consistency protocol for highly-scalable data-shipping DBMS architectures. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:222-234 [Conf]
  10. Vidyasagar Nookala, Ying Chen, David J. Lilja, Sachin S. Sapatnekar
    Microarchitecture-aware floorplanning using a statistical design of experiments approach. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:579-584 [Conf]
  11. A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rangarajan, Priyadarshini Ranganath, David J. Lilja
    The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices. [Citation Graph (0, 0)][DBLP]
    DSN, 2004, pp:167-176 [Conf]
  12. Peng-fei Chuang, Resit Sendag, David J. Lilja
    Improving Data Cache Performance via Address Correlation: An Upper Bound Study. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:541-550 [Conf]
  13. Resit Sendag, David J. Lilja, Steven R. Kunkel
    Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:468-480 [Conf]
  14. Joshua J. Yi, Resit Sendag, David J. Lilja
    Increasing Instruction-Level Parallelism with Instruction Precomputation (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:481-485 [Conf]
  15. David J. Lilja, Jonathan Schmitt
    A Data Parallel Implementation of the TRFD Program from the Perfect Benchmarks. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1994, pp:355-362 [Conf]
  16. Baris M. Kazar, Shashi Shekhar, David J. Lilja, Ranga Raju Vatsavai, R. Kelley Pace
    Comparing Exact and Approximate Spatial Auto-regression Model Solutions for Spatial Data Analysis. [Citation Graph (0, 0)][DBLP]
    GIScience, 2004, pp:140-161 [Conf]
  17. Drew C. Ness, Christian J. Hescott, David J. Lilja
    Exploring subsets of standard cell libraries to exploit natural fault masking capabilities for reliable logic. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:208-211 [Conf]
  18. JunSeong Kim, David J. Lilja
    Exploiting multiple heterogeneous networks to reduce communication costs in parallel programs. [Citation Graph (0, 0)][DBLP]
    Heterogeneous Computing Workshop, 1997, pp:83-95 [Conf]
  19. Kelvin K. Yue, David J. Lilja
    Parameter estimation for a generalized parallel loop scheduling algorithm. [Citation Graph (0, 0)][DBLP]
    HICSS (2), 1995, pp:187-0 [Conf]
  20. Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew
    Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:203-217 [Conf]
  21. Steven P. Vanderwiel, Daphna Nathanson, David J. Lilja
    Complexity and Performance in Parallel Programming Languages. [Citation Graph (0, 0)][DBLP]
    HIPS, 1997, pp:3-0 [Conf]
  22. Jian Huang, David J. Lilja
    Exploiting Basic Block Value Locality with Block Reuse. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:106-114 [Conf]
  23. Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag, David J. Lilja, Douglas M. Hawkins
    Characterizing and Comparing Prevailing Simulation Techniques. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:266-277 [Conf]
  24. Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
    A Statistically Rigorous Approach for Improving Simulation Methodology. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:281-0 [Conf]
  25. JunSeong Kim, David J. Lilja
    Utilizing Heterogeneous Networks in Distributed Parallel Computing Systems. [Citation Graph (0, 0)][DBLP]
    HPDC, 1997, pp:336-0 [Conf]
  26. David J. Lilja, Shanthi Ambalavanan
    A Superassociative Tagged Cache Coherence Directory. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:42-45 [Conf]
  27. Farnaz Mounes-Toussi, David J. Lilja
    Write buffer design for cache-coherent shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:506-511 [Conf]
  28. Joshua J. Yi, David J. Lilja
    Improving Processor Performance by Simplifying and Bypassing Trivial Computations. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:462-0 [Conf]
  29. Steven P. Vanderwiel, David J. Lilja
    A Compiler-Assisted Data Prefetch Controller. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:372-377 [Conf]
  30. Qing Zhao, David J. Lilja
    Compiler-Directed Classification of Value Locality Behavior. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:240-248 [Conf]
  31. Babak Hamidzadeh, David J. Lilja
    Dynamic Scheduling Strategies for Shared-memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1996, pp:208-215 [Conf]
  32. Haowei Bai, Mohammed Atiquzzaman, David J. Lilja
    Using ECN Marks to Improve TCP Performance over Lossy Links. [Citation Graph (0, 0)][DBLP]
    ICETE (3), 2004, pp:437-445 [Conf]
  33. Keqiang Wu, David J. Lilja
    Self-tuning Speculation for Maintaining the Consistency of Client-Cached Data. [Citation Graph (0, 0)][DBLP]
    ICPADS, 2004, pp:91-100 [Conf]
  34. Dennis Abts, Mike Roberts, David J. Lilja
    A Balanced Approach to High-Level Verification: Performance Trade-Offs in Verifying Large-Scale Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 2000, pp:505-0 [Conf]
  35. Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia Zheng, Stephen J. Schwinn, Xin Wang, Qing Zhao, Zhiyuan Li, David J. Lilja, Pen-Chung Yew
    High-Level Information - An Approach for Integrating Front-End and Back-End Compilers. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:346-355 [Conf]
  36. Babak Hamidzadeh, David J. Lilja
    Self-Adjusting Scheduling: An On-Line Optimization Technique for Locality Management and Load Balancing. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:39-46 [Conf]
  37. Donald Johnson, David J. Lilja, John Riedl
    A Distributed Hardware Mechanism for Process Synchronization on Shared-Bus Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:268-275 [Conf]
  38. Donald Johnson, David J. Lilja, John Riedl
    A Circulating Active Barrier Synchronization Mechanism. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1995, pp:202-209 [Conf]
  39. Iffat H. Kazi, David J. Lilja
    A Comprehensive Dynamic Processor Allocation Scheme for Multiprogrammed Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    ICPP, 2000, pp:153-162 [Conf]
  40. David J. Lilja, Pen-Chung Yew
    Comparing Parallelism Extraction Techniques: Superscalar Processors, Pipelined Processors, and Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:563-564 [Conf]
  41. Farnaz Mounes-Toussi, David J. Lilja
    The Effect of using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:217-224 [Conf]
  42. Trung N. Nguyen, Zhiyuan Li, David J. Lilja
    Efficient Use of Dynamically Tagged Directories Through Compiler Analysis [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:112-119 [Conf]
  43. Kelvin K. Yue, David J. Lilja
    Performance Analysis and Prediction of Processor Scheduling Strategies in Multiprogrammed Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, Vol. 3, 1996, pp:70-78 [Conf]
  44. Iffat H. Kazi, David J. Lilja
    Coarse-grained Speculative Execution in Shared-memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:93-100 [Conf]
  45. David J. Lilja, Pen-Chung Yew
    Combining hardware and software cache coherence strategies. [Citation Graph (0, 0)][DBLP]
    ICS, 1991, pp:274-283 [Conf]
  46. Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li
    An evaluation of a compiler optimization for improving the performance of a coherence directory. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1994, pp:75-84 [Conf]
  47. Joshua J. Yi, Hans Vandierendonck, Lieven Eeckhout, David J. Lilja
    The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:75-86 [Conf]
  48. Keqiang Wu, Resit Sendag, David J. Lilja
    Exploring Memory Access Regularity in Pointer-Intensive Application Programs. [Citation Graph (0, 0)][DBLP]
    IDEAL, 2003, pp:472-476 [Conf]
  49. Trung N. Nguyen, Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li
    A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement. [Citation Graph (0, 0)][DBLP]
    IFIP PACT, 1994, pp:69-78 [Conf]
  50. Dennis Abts, Steve Scott, David J. Lilja
    So Many States, So Little Time: Verifying Memory Coherence in the Cray X1. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:11- [Conf]
  51. Ying Chen, Resit Sendag, David J. Lilja
    Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:76- [Conf]
  52. JunSeong Kim, David J. Lilja
    A Network Status Predictor to Support Dynamic Scheduling in Network-Based Computing Systems. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:372-378 [Conf]
  53. Iffat H. Kazi, David J. Lilja
    JavaSpMT: A Speculative Thread Pipelining Parallelization Model for Java Programs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2000, pp:559-564 [Conf]
  54. Keqiang Wu, David J. Lilja, Haowei Bai
    The Applicability of Adaptive Control Theory to QoS Design: Limitations and Solutions. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  55. Kelvin K. Yue, David J. Lilja
    Efficient Execution of Parallel Applications in Multiprogrammed Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:448-456 [Conf]
  56. Kelvin K. Yue, David J. Lilja
    Dynamic Processor Allocation with the Solaris Operating System. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:392-397 [Conf]
  57. Vidyasagar Nookala, David J. Lilja, Sachin S. Sapatnekar
    Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:298-303 [Conf]
  58. Christian J. Hescott, Drew C. Ness, David J. Lilja
    MEMESTAR: A Simulation Framework for Reliability Evaluation over Multiple Environments. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:917-922 [Conf]
  59. A. J. KleinOsowski, David J. Lilja
    The NanoBox Project: Exploring Fabrics of Self-Correcting Logic Blocks for High Defect Rate Molecular Device Technologies. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:19-24 [Conf]
  60. Kelvin K. Yue, David J. Lilja
    Loop-Level Process Control: An Effective Processor Allocation Policy for Multiprogrammed Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    JSSPP, 1995, pp:182-199 [Conf]
  61. Jian Huang, David J. Lilja
    An Efficient Strategy for Developing a Simulator for a Novel Concurrent Multithreaded Processor Architecture. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 1998, pp:185-191 [Conf]
  62. Kevin KleinOsowski, Thomas Ruwart, David J. Lilja
    Communicating Quality of Service Requirements to an Object-Based Storage Device. [Citation Graph (0, 0)][DBLP]
    MSST, 2005, pp:224-231 [Conf]
  63. Ying Chen, Dennis Abts, David J. Lilja
    State Pruning for Test Vector Generation for a Multiprocessor Cache Coherence Protocol. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2004, pp:74-77 [Conf]
  64. Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
    Model Based Test Generation for Microprocessor Architecture Validation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:465-472 [Conf]
  65. Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal
    Shared-memory multiprocessing: Current state and future directions. [Citation Graph (0, 0)][DBLP]
    Advances in Computers, 2000, v:53, n:, pp:2-55 [Journal]
  66. A. J. KleinOsowski, David J. Lilja
    MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
  67. Resit Sendag, Peng-fei Chuang, David J. Lilja
    Address Correlation: Exceeding the Limits of Locality. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2003, v:2, n:, pp:- [Journal]
  68. Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew
    Changing Interaction of Compiler and Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:12, pp:51-58 [Journal]
  69. David J. Lilja
    Reducing the Branch Penalty in Pipelined Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1988, v:21, n:7, pp:47-55 [Journal]
  70. David J. Lilja
    Exploiting the Parallelism Available in Loops. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1994, v:27, n:2, pp:13-26 [Journal]
  71. Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai
    Challenges in Computer Architecture Evaluation. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:8, pp:30-36 [Journal]
  72. Steven P. Vanderwiel, David J. Lilja
    When Caches Aren't Enough: Data Prefetching Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:7, pp:23-30 [Journal]
  73. Joshua J. Yi, Lieven Eeckhout, David J. Lilja, Brad Calder, Lizy Kurian John, James E. Smith
    The Future of Simulation: A Field of Dreams. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2006, v:39, n:11, pp:22-29 [Journal]
  74. Iffat H. Kazi, David J. Lilja
    Dynamically adapting to system load and program behavior in multiprogrammed multiprocessor systems. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2002, v:14, n:12, pp:957-985 [Journal]
  75. Steven P. Vanderwiel, Daphna Nathanson, David J. Lilja
    A comparative analysis of parallel programming language complexity and performance. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1998, v:10, n:10, pp:807-820 [Journal]
  76. Kelvin K. Yue, David J. Lilja
    Implementing a dynamic processor allocation policy for multiprogrammed parallel applications in the Solaris. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2001, v:13, n:6, pp:449-464 [Journal]
  77. Iffat H. Kazi, Howard H. Chen, Berdenia Stanley, David J. Lilja
    Techniques for obtaining high performance in Java programs. [Citation Graph (0, 0)][DBLP]
    ACM Comput. Surv., 2000, v:32, n:3, pp:213-240 [Journal]
  78. Steven P. Vanderwiel, David J. Lilja
    Data prefetch mechanisms. [Citation Graph (0, 0)][DBLP]
    ACM Comput. Surv., 2000, v:32, n:2, pp:174-199 [Journal]
  79. Iffat H. Kazi, Davis P. Jose, Badis Ben-Hamida, Christian J. Hescott, Chris Kwok, Joseph A. Konstan, David J. Lilja, Pen-Chung Yew
    JaViz: A client/server Java profiling tool. [Citation Graph (0, 0)][DBLP]
    IBM Systems Journal, 2000, v:39, n:1, pp:96-0 [Journal]
  80. Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan
    A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2005, v:20, n:5, pp:596-606 [Journal]
  81. Jenn-Yuan Tsai, Zhenzhen Jiang, Zhiyuan Li, David J. Lilja, Xin Wang, Pen-Chung Yew, Bixia Zheng, Stephen J. Schwinn
    Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1998, v:14, n:1, pp:205-222 [Journal]
  82. Donald Johnson, David J. Lilja, John Riedl, James Anderson
    Low-Cost, High-Performance Barrier Synchronization on Networks of Workstations. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1997, v:40, n:1, pp:131-137 [Journal]
  83. David J. Lilja
    Special Issue on Compilation and Architectural Support for Parallel Applications - Guest Editor's Introduction. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1999, v:58, n:2, pp:129-131 [Journal]
  84. Kelvin K. Yue, David J. Lilja
    Comparing Processor Allocation Strategies in Multiprogrammed Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1998, v:49, n:2, pp:245-258 [Journal]
  85. Donald Johnson, David J. Lilja, John Riedl
    Circulating shared-registers for multiprocessor systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:3, pp:152-168 [Journal]
  86. David J. Lilja
    A Multiprocessor Architecture Combining Fine-Grained and Coarse-Grained Parallelism Strategies. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1994, v:20, n:5, pp:729-751 [Journal]
  87. Jian Huang, David J. Lilja
    Extending Value Reuse to Basic Blocks with Compiler Support. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:4, pp:331-347 [Journal]
  88. Jian Huang, David J. Lilja
    Balancing Reuse Opportunities and Performance Gains with Subblock Value Reuse. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:8, pp:1032-1050 [Journal]
  89. Jenn-Yuan Tsai, Jian Huang, Christoffer Amlo, David J. Lilja, Pen-Chung Yew
    The Superthreaded Processor Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:9, pp:881-902 [Journal]
  90. Joshua J. Yi, David J. Lilja
    Simulation of Computer Architectures: Simulators, Benchmarks, Methodologies, and Recommendations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:3, pp:268-280 [Journal]
  91. Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
    Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:11, pp:1360-1373 [Journal]
  92. Qing Zhao, David J. Lilja
    Static Classification of Value Predictability Using Compiler Hints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:8, pp:929-944 [Journal]
  93. Babak Hamidzadeh, Lau Ying Kit, David J. Lilja
    Dynamic Task Scheduling Using Online Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:11, pp:1151-1163 [Journal]
  94. Iffat H. Kazi, David J. Lilja
    Coarse-Grained Thread Pipelining: A Speculative Parallel Execution Model for Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:9, pp:952-966 [Journal]
  95. J. S. Kim, David J. Lilja
    Performance-Based Path Determination for Interprocessor Communication in Distributed Computing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:3, pp:316-327 [Journal]
  96. David J. Lilja
    The Impact of Parallel Loop Scheduling Strategies on Prefetching in a Shared Memory Multiprocessor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1994, v:5, n:6, pp:573-584 [Journal]
  97. David J. Lilja, Pen-Chung Yew
    Improving Memory Utilization in Cache Coherence Directories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:10, pp:1130-1146 [Journal]
  98. Farnaz Mounes-Toussi, David J. Lilja
    The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:5, pp:470-481 [Journal]
  99. Resit Sendag, Ying Chen, David J. Lilja
    The Impact of Incorrectly Speculated Memory Operations in a Multithreaded Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:3, pp:271-285 [Journal]
  100. Kelvin K. Yue, David J. Lilja
    An Effective Processor Allocation Strategy for Multiprogrammed Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1997, v:8, n:12, pp:1246-1258 [Journal]
  101. Haowei Bai, Mohammed Atiquzzaman, David J. Lilja
    Layered view of QoS issues in IP-based mobile wireless networks. [Citation Graph (0, 0)][DBLP]
    Int. J. Communication Systems, 2006, v:19, n:2, pp:141-161 [Journal]
  102. Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
    Design fault directed test generation for microprocessor validation. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:761-766 [Conf]
  103. Joshua J. Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, Lizy Kurian John
    Evaluating Benchmark Subsetting Approaches. [Citation Graph (0, 0)][DBLP]
    IISWC, 2006, pp:93-104 [Conf]
  104. Keqiang Wu, David J. Lilja, Haowei Bai
    An adaptive dual control framework for QoS design. [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 2007, v:10, n:2, pp:217-228 [Journal]
  105. Joshua J. Yi, Resit Sendag, David J. Lilja, Douglas M. Hawkins
    Speed versus Accuracy Trade-Offs in Microarchitectural Simulations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:11, pp:1549-1563 [Journal]

  106. Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions. [Citation Graph (, )][DBLP]


  107. Using a Statistical Approach for Optimal Security Parameter Determination. [Citation Graph (, )][DBLP]


  108. Guiding Circuit Level Fault-Tolerance Design with Statistical Methods. [Citation Graph (, )][DBLP]


  109. Scaling Analytical Models for Soft Error Rate Estimation Under a Multiple-Fault Environment. [Citation Graph (, )][DBLP]


  110. Statistically translating low-level error probabilities to increase the accuracy and efficiency of reliability simulations in hardware description languages. [Citation Graph (, )][DBLP]


  111. A reconfigurable stochastic architecture for highly reliable computing. [Citation Graph (, )][DBLP]


  112. The synthesis of combinational logic to generate probabilities. [Citation Graph (, )][DBLP]


  113. SARD: A statistical approach for ranking database tuning parameters. [Citation Graph (, )][DBLP]


  114. Accelerating Lattice Boltzmann Fluid Flow Simulations Using Graphics Processors. [Citation Graph (, )][DBLP]


  115. Low power/area branch prediction using complementary branch predictors. [Citation Graph (, )][DBLP]


  116. Independent Component Analysis and Evolutionary Algorithms for Building Representative Benchmark Subsets. [Citation Graph (, )][DBLP]


  117. Comparing simulation techniques for microarchitecture-aware floorplanning. [Citation Graph (, )][DBLP]


  118. Evaluating the efficacy of statistical simulation for design space exploration. [Citation Graph (, )][DBLP]


  119. Large Block CLOCK (LB-CLOCK): A write caching algorithm for solid state disks. [Citation Graph (, )][DBLP]


  120. Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education. [Citation Graph (, )][DBLP]


  121. Improving risk assessment methodology: a statistical design of experiments approach. [Citation Graph (, )][DBLP]


  122. CIM: A Reliable Metric for Evaluating Program Phase Classifications. [Citation Graph (, )][DBLP]


  123. Dynamic scheduling techniques for heterogeneous computing systems. [Citation Graph (, )][DBLP]


  124. Partitioning tasks between a pair of interconnected heterogeneous processors: A case study. [Citation Graph (, )][DBLP]


  125. Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education [Citation Graph (, )][DBLP]


  126. Exploiting the Impact of Database System Configuration Parameters: A Design of Experiments Approach. [Citation Graph (, )][DBLP]


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