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Publications of Author

1. Kei Karasawa, Makoto Iwata, Hiroaki Terada
   Direct Generation of Data-Driven Program for Stream-Oriented Processing. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 1997, pp:295-306 [Conf]
   
2. Teruhiko Kamigata, Koso Murakami, Makoto Iwata, Hiroaki Terada
   Proposal of Data-Driven Processor Architecture Qv-K1. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1999, pp:336-337 [Conf]
   
3. Xiaoyan Yu, Makoto Iwata
   Image compression based on BTC-DPCM and its data-driven parallel implementation. [Citation Graph (0, 0)][DBLP]
   ICIP (1), 2005, pp:813-816 [Conf]
   
4. Shuji Sannomiya, Yoichi Omori, Makoto Iwata
   A Macroscopic Behavior Model for Self-Timed Pipeline Systems. [Citation Graph (0, 0)][DBLP]
   PADS, 2003, pp:133-142 [Conf]
   
5. Satoko Tsunoda, Akira Matsui, Yasuhiro Wada, Takeyuki Aiba, Chiyoko Nagai, Yumiko Uchiyama, Makoto Iwata, Shigeki Tanaka, Michiyo Kozawa, Masae Kamiyama, Kazuyoshi Fukuzawa
   A computational approach to arm movement on the sagittal plane performed by parietal lobe damaged patients: an attempt to examine a computational model for handwriting for its neurobiological plausibility from a neuropsychological symptom. [Citation Graph (0, 0)][DBLP]
   Neurocomputing, 2003, v:52, n:, pp:655-660 [Journal]
   
6. Ruck Thawonmas, Makoto Iwata, Satoshi Fukunaga
   A Novel Parallel Model for Self-Organizing Map and its Efficient Implementation on a Data-Driven Multiprocessor. [Citation Graph (0, 0)][DBLP]
   JACIII, 2003, v:7, n:3, pp:355-361 [Journal]
   
7. Makoto Iwata, Souichi Miyata, Hiroaki Terada
   A self-timed superpipeline data-driven processor. [Citation Graph (0, 0)][DBLP]
   Systems and Computers in Japan, 2000, v:31, n:8, pp:89-97 [Journal]
   
8. 
   A Software-Defined ADC and DAC on Data-Driven Processor. [Citation Graph (, )][DBLP]
   
   
9. 
   Autonomous Power-Supply Control for Ultra-Low-Power Self-Timed Pipeline. [Citation Graph (, )][DBLP]
   
   
10. 
    Surrounding Healthcare Environment on Ad Hoc Network. [Citation Graph (, )][DBLP]
    
    
11. 
    A Self-Timed Pipeline Circuit for Low-Power Surrounding LSI Chips. [Citation Graph (, )][DBLP]
    
    
12. 
    CUE-v3: Data-Driven Chip Multi-Processor for Ad hoc and Ubiquitous Networking Environment. [Citation Graph (, )][DBLP]
    
    
13. 
    Self-Timed Stream Processor for Surrounding Computing Environment. [Citation Graph (, )][DBLP]
    
    
14. 
    Collaborative Research Project on Ultra-Low-Power Data-Driven Networking System. [Citation Graph (, )][DBLP]
    
    
15. 
    A Data-Driven On-Chip Simulation Module and Its FPGA Implementation. [Citation Graph (, )][DBLP]
    
    
16. 
    Data-Driven Protocol Off-Loading for Ad Hoc Networking Environment. [Citation Graph (, )][DBLP]
    
    
17. 
    An Offloading Scheme for Ultra Low Power Data-Driven Networking System. [Citation Graph (, )][DBLP]
    
    
18. 
    An Application of ULP-DDNS: Smart Pervasive Daily Healthcare System. [Citation Graph (, )][DBLP]
    
    
19. 
    Self-Timed Power Gating for Ultra-Low-Power Pipeline Circuit. [Citation Graph (, )][DBLP]