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Saman P. Amarasinghe: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Samuel Larsen, Emmett Witchel, Saman P. Amarasinghe
    Increasing and Detecting Memory Address Congruence. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:18-29 [Conf]
  2. Michael I. Gordon, William Thies, Michal Karczmarek, Jasper Lin, Ali S. Meli, Andrew A. Lamb, Chris Leger, Jeremy Wong, Henry Hoffmann, David Maze, Saman P. Amarasinghe
    A stream compiler for communication-exposed architectures. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2002, pp:291-303 [Conf]
  3. Walter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe
    Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:46-57 [Conf]
  4. Michael I. Gordon, William Thies, Saman P. Amarasinghe
    Exploiting coarse-grained task, data, and pipeline parallelism in stream programs. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:151-162 [Conf]
  5. Sitij Agrawal, William Thies, Saman P. Amarasinghe
    Optimizing stream programs using linear state space analysis. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:126-136 [Conf]
  6. William Thies, Michal Karczmarek, Saman P. Amarasinghe
    StreamIt: A Language for Streaming Applications. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:179-196 [Conf]
  7. Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, Larry Rudolph, Weng-Fai Wong
    Ubiquitous Memory Introspection. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:299-311 [Conf]
  8. Saman P. Amarasinghe
    Multicores from the Compiler's Perspective: A Blessing or a Curse?. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:137- [Conf]
  9. Derek Bruening, Saman P. Amarasinghe
    Maintaining Consistency and Bounding Capacity of Software Code Caches. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:74-85 [Conf]
  10. Derek Bruening, Timothy Garnett, Saman P. Amarasinghe
    An Infrastructure for Adaptive Dynamic Optimization. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:265-275 [Conf]
  11. Mark Stephenson, Saman P. Amarasinghe
    Predicting Unroll Factors Using Supervised Classification. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:123-134 [Conf]
  12. William Thies, John Paul Urbanski, Todd Thorsen, Saman P. Amarasinghe
    Abstraction Layers for Scalable Microfluidic Biocomputers. [Citation Graph (0, 0)][DBLP]
    DNA, 2006, pp:308-323 [Conf]
  13. Mark Stephenson, Una-May O'Reilly, Martin C. Martin, Saman P. Amarasinghe
    Genetic Programming Applied to Compiler Heuristic Optimization. [Citation Graph (0, 0)][DBLP]
    EuroGP, 2003, pp:238-253 [Conf]
  14. Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe
    Parallelizing Applications into Silicon. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:70-0 [Conf]
  15. Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:341-353 [Conf]
  16. Gleb A. Chuvpilo, Saman P. Amarasinghe
    High-Bandwidth Packet Switching on the Raw General-Purpose Architecture. [Citation Graph (0, 0)][DBLP]
    ICPP, 2003, pp:3-10 [Conf]
  17. Chau-Wen Tseng, Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Monica S. Lam
    Unified Compilation Techniques for Shared and Distributed Address Space Machines. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1995, pp:67-76 [Conf]
  18. Csaba Andras Moritz, Matthew Frank, Saman P. Amarasinghe
    FlexCache: A Framework for Flexible Compiler Generated Data Caching. [Citation Graph (0, 0)][DBLP]
    Intelligent Memory Systems, 2000, pp:135-146 [Conf]
  19. Darin Petkov, Randolph E. Harr, Saman P. Amarasinghe
    Efficient Pipelining of Nested Loops: Unroll-and-Squash. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  20. William Thies, Michael I. Gordon, Michal Karczmarek, Jasper Lin, David Maze, Rodric M. Rabbah, Saman P. Amarasinghe
    Language and Compiler Design for Streaming Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS Next Generation Software Program - NSFNGS - PI Workshop, 2004, pp:- [Conf]
  21. M. Drake, Henry Hoffmann, Rodric M. Rabbah, Saman P. Amarasinghe
    MPEG-2 decoding in a stream programming language. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  22. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Maps: A Compiler-Managed Memory System for Raw Machines. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:4-15 [Conf]
  23. Michael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
    Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:2-13 [Conf]
  24. Saman P. Amarasinghe, Jennifer-Ann M. Anderson, Monica S. Lam, Amy W. Lim
    An Overview of a Compiler for Scalable Parallel Machines. [Citation Graph (0, 0)][DBLP]
    LCPC, 1993, pp:253-272 [Conf]
  25. Mary W. Hall, Brian R. Murphy, Saman P. Amarasinghe, Shih-wei Liao, Monica S. Lam
    Interprocedural Analysis for Parallelization. [Citation Graph (0, 0)][DBLP]
    LCPC, 1995, pp:61-80 [Conf]
  26. Jeffrey Sheldon, Walter Lee, Ben Greenwald, Saman P. Amarasinghe
    Strength Reduction of Integer Division and Modulo Operations. [Citation Graph (0, 0)][DBLP]
    LCPC, 2001, pp:254-273 [Conf]
  27. Diego Puppin, Mark Stephenson, Saman P. Amarasinghe, Martin C. Martin, Una-May O'Reilly
    Adapting Convergent Scheduling Using Machine-Learning. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:17-31 [Conf]
  28. Michal Karczmarek, William Thies, Saman P. Amarasinghe
    Phased scheduling of stream programs. [Citation Graph (0, 0)][DBLP]
    LCTES, 2003, pp:103-112 [Conf]
  29. Janis Sermulins, William Thies, Rodric M. Rabbah, Saman P. Amarasinghe
    Cache aware optimization of stream programs. [Citation Graph (0, 0)][DBLP]
    LCTES, 2005, pp:115-126 [Conf]
  30. Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasinghe
    Exploiting Vector Parallelism in Software Pipelined Loops. [Citation Graph (0, 0)][DBLP]
    MICRO, 2005, pp:119-129 [Conf]
  31. Walter Lee, Diego Puppin, Shane Swenson, Saman P. Amarasinghe
    Convergent scheduling. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:111-122 [Conf]
  32. Saman P. Amarasinghe
    Defying the speed of light: : a spatially-aware compiler for wire-exposed architectures. [Citation Graph (0, 0)][DBLP]
    ASIA-PEPM, 2002, pp:70- [Conf]
  33. Saman P. Amarasinghe, Monica S. Lam
    Communication Optimization and Code Generation for Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    PLDI, 1993, pp:126-138 [Conf]
  34. Andrew A. Lamb, William Thies, Saman P. Amarasinghe
    Linear analysis and optimization of stream programs. [Citation Graph (0, 0)][DBLP]
    PLDI, 2003, pp:12-25 [Conf]
  35. Samuel Larsen, Saman P. Amarasinghe
    Exploiting superword level parallelism with multimedia instruction sets. [Citation Graph (0, 0)][DBLP]
    PLDI, 2000, pp:145-156 [Conf]
  36. Mark Stephenson, Saman P. Amarasinghe, Martin C. Martin, Una-May O'Reilly
    Meta optimization: improving compiler heuristics with machine learning. [Citation Graph (0, 0)][DBLP]
    PLDI, 2003, pp:77-90 [Conf]
  37. Mark Stephenson, Jonathan Babb, Saman P. Amarasinghe
    Bitwidth analysis with application to silicon compilation. [Citation Graph (0, 0)][DBLP]
    PLDI, 2000, pp:108-120 [Conf]
  38. William Thies, Frédéric Vivien, Jeffrey Sheldon, Saman P. Amarasinghe
    A Unified Framework for Schedule and Storage Optimization. [Citation Graph (0, 0)][DBLP]
    PLDI, 2001, pp:232-242 [Conf]
  39. Dror E. Maydan, Saman P. Amarasinghe, Monica S. Lam
    Array Data-Flow Analysis and its Use in Array Privatization. [Citation Graph (0, 0)][DBLP]
    POPL, 1993, pp:2-15 [Conf]
  40. Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Monica S. Lam
    Data and Computation Transformations for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1995, pp:166-178 [Conf]
  41. William Thies, Michal Karczmarek, Janis Sermulins, Rodric M. Rabbah, Saman P. Amarasinghe
    Teleport messaging for distributed stream programs. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:224-235 [Conf]
  42. Saman P. Amarasinghe, Jennifer-Ann M. Anderson, Monica S. Lam, Chau-Wen Tseng
    An Overview of the SUIF Compiler for Scalable Parallel Machines. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:662-667 [Conf]
  43. Mary W. Hall, Brian R. Murphy, Saman P. Amarasinghe
    Interprocedural Parallelization Analysis: A Case Study. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:650-655 [Conf]
  44. Mary W. Hall, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Monica S. Lam
    Detecting Coarse - Grain Parallelism Using an Interprocedural Parallelizing Compiler. [Citation Graph (0, 0)][DBLP]
    SC, 1995, pp:- [Conf]
  45. Vladimir Kiriansky, Derek Bruening, Saman P. Amarasinghe
    Secure Execution via Program Shepherding. [Citation Graph (0, 0)][DBLP]
    USENIX Security Symposium, 2002, pp:191-206 [Conf]
  46. Mary W. Hall, Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Edouard Bugnion, Monica S. Lam
    Maximizing Multiprocessor Performance with the SUIF Compiler. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1996, v:29, n:12, pp:84-89 [Journal]
  47. Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal
    Baring It All to Software: Raw Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:86-93 [Journal]
  48. Mary W. Hall, Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Edouard Bugnion, Monica S. Lam
    Maximizing Multiprocessor Performance with the SUIF Compiler. [Citation Graph (0, 0)][DBLP]
    Digital Technical Journal, 1998, v:10, n:1, pp:71-80 [Journal]
  49. Saman P. Amarasinghe, Michael I. Gordon, Michal Karczmarek, Jasper Lin, David Maze, Rodric M. Rabbah, William Thies
    Language and Compiler Design for Streaming Applications. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2005, v:33, n:2-3, pp:261-278 [Journal]
  50. Michael Bedford Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
    The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:2, pp:25-35 [Journal]
  51. William Thies, Michal Karczmarek, Michael I. Gordon, David Maze, Jeremy Wong, Henry Hoffmann, Matthew Brown, Saman P. Amarasinghe
    A common machine language for grid-based architectures. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2002, v:30, n:3, pp:13-14 [Journal]
  52. Robert P. Wilson, Robert S. French, Christopher S. Wilson, Saman P. Amarasinghe, Jennifer-Ann M. Anderson, Steven W. K. Tjiang, Shih-wei Liao, Chau-Wen Tseng, Mary W. Hall, Monica S. Lam, John L. Hennessy
    SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compilers. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1994, v:29, n:12, pp:31-37 [Journal]
  53. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Compiler Support for Scalable and Efficient Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1234-1247 [Journal]
  54. Mary W. Hall, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Monica S. Lam
    Interprocedural parallelization analysis in SUIF. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2005, v:27, n:4, pp:662-731 [Journal]
  55. Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Scalar Operand Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:2, pp:145-162 [Journal]
  56. William Thies, Frédéric Vivien, Saman P. Amarasinghe
    A step towards unifying schedule and storage optimization. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2007, v:29, n:6, pp:- [Journal]

  57. (How) can programmers conquer the multicore menace? [Citation Graph (, )][DBLP]


  58. Kendo: efficient deterministic multithreading in software. [Citation Graph (, )][DBLP]


  59. How to Do a Million Watchpoints: Efficient Debugging Using Dynamic Instrumentation. [Citation Graph (, )][DBLP]


  60. Umbra: efficient and scalable memory shadowing. [Citation Graph (, )][DBLP]


  61. Efficient memory shadowing for 64-bit architectures. [Citation Graph (, )][DBLP]


  62. A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs. [Citation Graph (, )][DBLP]


  63. Manipulating lossless video in the compressed domain. [Citation Graph (, )][DBLP]


  64. PetaBricks: a language and compiler for algorithmic choice. [Citation Graph (, )][DBLP]


  65. Autotuning multigrid with PetaBricks. [Citation Graph (, )][DBLP]


  66. Automatically patching errors in deployed software. [Citation Graph (, )][DBLP]


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