In-Ho Moon, Per Bjesse, Carl Pixley A compositional approach to the combination of combinational and sequential equivalence checking of circuits without known reset states. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:1170-1175 [Conf]
A Practical Approach to Word Level Model Checking of Industrial Netlists. [Citation Graph (, )][DBLP]
Word-Level Sequential Memory Abstraction for Model Checking. [Citation Graph (, )][DBLP]
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