The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Tim Leonard: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Per Bjesse, Tim Leonard, Abdel Mokkedem
    Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers. [Citation Graph (0, 0)][DBLP]
    CAV, 2001, pp:454-464 [Conf]
  2. Abdel Mokkedem, Tim Leonard
    Formal Verification of the Alpha 21364 Network Protocol. [Citation Graph (0, 0)][DBLP]
    TPHOLs, 2000, pp:443-461 [Conf]

  3. An FPGA Implementation of Explicit-State Model Checking. [Citation Graph (, )][DBLP]


  4. Extracting models from design documents with mapster. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002