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Ismail Kadayif: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
    Leakage Energy Management in Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:131-140 [Conf]
  2. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen
    Studying interactions between prefetching and cache line turnoff. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:545-548 [Conf]
  3. Ismail Kadayif, Mahmut T. Kandemir, Feihui Li
    Prefetching-aware cache line turnoff for saving leakage energy. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:182-187 [Conf]
  4. Mahmut T. Kandemir, Ismail Kadayif, Alok N. Choudhary, Joseph Zambreno
    Optimizing inter-nest data locality. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:127-135 [Conf]
  5. Mahmut T. Kandemir, Ibrahim Kolcu, Ismail Kadayif
    Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:276-292 [Conf]
  6. Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu, Guangyu Chen
    Locality-conscious process scheduling in embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:193-198 [Conf]
  7. Mahmut T. Kandemir, Ismail Kadayif
    Compiler-directed selection of dynamic memory layouts. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:219-224 [Conf]
  8. Mahmut T. Kandemir, Ismail Kadayif, Guilin Chen
    Compiler-directed code restructuring for reducing data TLB energy. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:98-103 [Conf]
  9. Ismail Kadayif, Mahmut T. Kandemir, Mustafa Karaköy
    An energy saving strategy based on adaptive loop parallelization. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:195-200 [Conf]
  10. Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
    An integer linear programming based approach for parallelizing applications in On-chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:703-708 [Conf]
  11. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    Dynamic Management of Scratch-Pad Memory Space. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:690-695 [Conf]
  12. Ismail Kadayif, Mahmut T. Kandemir
    Tuning In-Sensor Data Filtering to Reduce Energy Consumption in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:852-857 [Conf]
  13. Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu
    Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1158-1163 [Conf]
  14. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:436-442 [Conf]
  15. Victor De La Luz, Mahmut T. Kandemir, Ismail Kadayif, Ugur Sezer
    Generalized Data Transformations for Enhancing Cache Behavior. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10906-10911 [Conf]
  16. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary, Ismail Kadayif
    An Integrated Approach for Improving Cache Behavior. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10796-10801 [Conf]
  17. Guangyu Chen, Ismail Kadayif, Wei Zhang 0002, Mahmut T. Kandemir, Ibrahim Kolcu, Ugur Sezer
    Compiler-Directed Management of Instruction Accesses. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:459-462 [Conf]
  18. Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif
    CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:41-49 [Conf]
  19. Ismail Kadayif, Mahmut T. Kandemir, Alok N. Choudhary, Mustafa Karaköy
    An Energy-Oriented Evaluation of Communication Optimizations for Microcensor Networks. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:279-286 [Conf]
  20. Ismail Kadayif, Mahmut T. Kandemir, I. Demirkiran
    Compiler-Guided Code Restructuring for Improving Instruction TLB Energy Behavior. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:304-309 [Conf]
  21. Ismail Kadayif, Partho Nath, Mahmut T. Kandemir, Anand Sivasubramaniam
    Compiler-directed physical address generation for reducing dTLB power. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:161-168 [Conf]
  22. Mahmut T. Kandemir, Ismail Kadayif, Ugur Sezer
    Exploiting scratch-pad memory using Presburger formulas. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:7-12 [Conf]
  23. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:20-25 [Conf]
  24. Ismail Kadayif, Mahmut T. Kandemir, Alok N. Choudhary
    A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality. [Citation Graph (0, 0)][DBLP]
    LCPC, 2002, pp:111-125 [Conf]
  25. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam
    Morphable Cache Architectures: Potential Benefits. [Citation Graph (0, 0)][DBLP]
    LCTES/OM, 2001, pp:128-137 [Conf]
  26. Mahmut T. Kandemir, Guangyu Chen, Ismail Kadayif
    Compiling for memory emergency. [Citation Graph (0, 0)][DBLP]
    LCTES, 2005, pp:213-221 [Conf]
  27. Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen
    Generating physical addresses directly for saving instruction TLB energy. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:185-196 [Conf]
  28. Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    vEC: virtual energy counters. [Citation Graph (0, 0)][DBLP]
    PASTE, 2001, pp:28-31 [Conf]
  29. Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
    Managing Leakage Energy in Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal]
  30. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    An integer linear programming-based tool for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:3, pp:247-260 [Journal]
  31. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:243-260 [Journal]
  32. Ismail Kadayif, Mahmut T. Kandemir
    Data space-oriented tiling for enhancing locality. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:2, pp:388-414 [Journal]
  33. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    Compiler-directed high-level energy estimation and optimization. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:4, pp:819-850 [Journal]
  34. Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen
    Optimizing instruction TLB energy using software and hardware techniques. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:229-257 [Journal]
  35. Victor M. DeLaLuz, Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
    Access Pattern Restructuring for Memory Energy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:4, pp:289-303 [Journal]
  36. Ismail Kadayif, Mahmut T. Kandemir
    Quasidynamic Layout Optimizations for Improving Data Locality. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:11, pp:996-1011 [Journal]
  37. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Ozcan Ozturk, Mustafa Karaköy, Ugur Sezer
    Optimizing Array-Intensive Applications for On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:5, pp:396-411 [Journal]
  38. Mahmut T. Kandemir, Ismail Kadayif, Alok N. Choudhary, Ibrahim Kolcu
    Compiler-directed scratch pad memory optimization for embedded multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:3, pp:281-287 [Journal]
  39. Ismail Kadayif, Mahmut T. Kandemir
    Modeling and improving data cache reliability. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 2007, pp:1-12 [Conf]

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