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Ahmed Bouajjani :
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Parosh Aziz Abdulla , Aurore Annichini , Saddek Bensalem , Ahmed Bouajjani , Peter Habermehl , Yassine Lakhnech Verification of Infinite-State Systems by Combining Abstraction and Reachability Analysis. [Citation Graph (0, 0)][DBLP ] CAV, 1999, pp:146-159 [Conf ] Parosh Aziz Abdulla , Ahmed Bouajjani , Bengt Jonsson On-the-Fly Analysis of Systems with Unbounded, Lossy FIFO Channels. [Citation Graph (0, 0)][DBLP ] CAV, 1998, pp:305-318 [Conf ] Parosh Aziz Abdulla , Ahmed Bouajjani , Bengt Jonsson , Marcus Nilsson Handling Global Conditions in Parameterized System Verification. [Citation Graph (0, 0)][DBLP ] CAV, 1999, pp:134-145 [Conf ] Aurore Annichini , Eugene Asarin , Ahmed Bouajjani Symbolic Techniques for Parametric Reasoning about Counter and Clock Systems. [Citation Graph (0, 0)][DBLP ] CAV, 2000, pp:419-434 [Conf ] Aurore Annichini , Ahmed Bouajjani , Mihaela Sighireanu TReX: A Tool for Reachability Analysis of Complex Systems. [Citation Graph (0, 0)][DBLP ] CAV, 2001, pp:368-372 [Conf ] Saddek Bensalem , Ahmed Bouajjani , Claire Loiseaux , Joseph Sifakis Property Preserving Simulations. [Citation Graph (0, 0)][DBLP ] CAV, 1992, pp:260-273 [Conf ] Ahmed Bouajjani , Marius Bozga , Peter Habermehl , Radu Iosif , Pierre Moro , Tomás Vojnar Programs with Lists Are Counter Automata. [Citation Graph (0, 0)][DBLP ] CAV, 2006, pp:517-531 [Conf ] Ahmed Bouajjani , Rachid Echahed , Riadh Robbana Verification of Context-Free Timed Systems Using Linear Hybrid Observers. [Citation Graph (0, 0)][DBLP ] CAV, 1994, pp:118-131 [Conf ] Ahmed Bouajjani , Jean-Claude Fernandez , Nicolas Halbwachs Minimal Model Generation. [Citation Graph (0, 0)][DBLP ] CAV, 1990, pp:197-203 [Conf ] Ahmed Bouajjani , Peter Habermehl , Tomás Vojnar Abstract Regular Model Checking. [Citation Graph (0, 0)][DBLP ] CAV, 2004, pp:372-386 [Conf ] Ahmed Bouajjani , Bengt Jonsson , Marcus Nilsson , Tayssir Touili Regular Model Checking. [Citation Graph (0, 0)][DBLP ] CAV, 2000, pp:403-418 [Conf ] Ahmed Bouajjani , Yassine Lakhnech , Riadh Robbana From Duration Calculus To Linear Hybrid Automata. [Citation Graph (0, 0)][DBLP ] CAV, 1995, pp:196-210 [Conf ] Ahmed Bouajjani , Riadh Robbana Verifying omega-Regular Properties for a Subclass of Linear Hybrid Systems. [Citation Graph (0, 0)][DBLP ] CAV, 1995, pp:437-450 [Conf ] Ahmed Bouajjani , Tayssir Touili Extrapolating Tree Transformations. [Citation Graph (0, 0)][DBLP ] CAV, 2002, pp:539-554 [Conf ] Ahmed Bouajjani , Javier Esparza , Oded Maler Reachability Analysis of Pushdown Automata: Application to Model-Checking. [Citation Graph (0, 0)][DBLP ] CONCUR, 1997, pp:135-150 [Conf ] Ahmed Bouajjani , Rachid Echahed , Riadh Robbana Verification of Nonregular Temporal Properties for Context-Free Processes. [Citation Graph (0, 0)][DBLP ] CONCUR, 1994, pp:81-97 [Conf ] Ahmed Bouajjani , Peter Habermehl Constrained Properties, Semilinear Systems, and Petri Nets. [Citation Graph (0, 0)][DBLP ] CONCUR, 1996, pp:481-497 [Conf ] Ahmed Bouajjani , Peter Habermehl , Tomás Vojnar Verification of Parametric Concurrent Systems with Prioritized FIFO Resource Management. [Citation Graph (0, 0)][DBLP ] CONCUR, 2003, pp:172-187 [Conf ] Ahmed Bouajjani , Yassine Lakhnech Temporal Logic + Timed Automata: Expressiveness and Decidability. [Citation Graph (0, 0)][DBLP ] CONCUR, 1995, pp:531-545 [Conf ] Ahmed Bouajjani , Markus Müller-Olm , Tayssir Touili Regular Symbolic Analysis of Dynamic Networks of Pushdown Systems. [Citation Graph (0, 0)][DBLP ] CONCUR, 2005, pp:473-487 [Conf ] Ahmed Bouajjani Verification of Infinite State Systems (Tutorial). [Citation Graph (0, 0)][DBLP ] CSL, 2003, pp:71- [Conf ] Parosh Aziz Abdulla , Ahmed Bouajjani , Julien d'Orso Deciding Monotonic Games. [Citation Graph (0, 0)][DBLP ] CSL, 2003, pp:1-14 [Conf ] Greta Yorsh , Alexander Moshe Rabinovich , Mooly Sagiv , Antoine Meyer , Ahmed Bouajjani A Logic of Reachable Patterns in Linked Data-Structures. [Citation Graph (0, 0)][DBLP ] FoSSaCS, 2006, pp:94-110 [Conf ] Ahmed Bouajjani , Antoine Meyer Symbolic Reachability Analysis of Higher-Order Context-Free Processes. [Citation Graph (0, 0)][DBLP ] FSTTCS, 2004, pp:135-147 [Conf ] Ahmed Bouajjani , Tayssir Touili Reachability Analysis of Process Rewrite Systems. [Citation Graph (0, 0)][DBLP ] FSTTCS, 2003, pp:74-87 [Conf ] Ahmed Bouajjani , Javier Esparza , Stefan Schwoon , Jan Strejcek Reachability Analysis of Multithreaded Software with Asynchronous Communication. [Citation Graph (0, 0)][DBLP ] FSTTCS, 2005, pp:348-359 [Conf ] Ahmed Bouajjani , Rachid Echahed , Riadh Robbana Verfying Invariance Properties of Timed Systems with Duration Variables. [Citation Graph (0, 0)][DBLP ] FTRTFT, 1994, pp:193-210 [Conf ] Ahmed Bouajjani , Yassine Lakhnech , Sergio Yovine Model-Checking for Extended Timed Temporal Logics. [Citation Graph (0, 0)][DBLP ] FTRTFT, 1996, pp:306-326 [Conf ] Ahmed Bouajjani , Agathe Merceron Parametric Verification of a Group Membership Algorithm. [Citation Graph (0, 0)][DBLP ] FTRTFT, 2002, pp:311-330 [Conf ] Ahmed Bouajjani , Rachid Echahed , Riadh Robbana On the Automatic Verification of Systems with Continuous Variables and Unbounded Discrete Data Structures. [Citation Graph (0, 0)][DBLP ] Hybrid Systems, 1994, pp:64-85 [Conf ] Ahmed Bouajjani , Yassine Lakhnech Logics vs. Automata: The Hybrid Case. [Citation Graph (0, 0)][DBLP ] Hybrid Systems, 1995, pp:531-542 [Conf ] Parosh Aziz Abdulla , Luc Boasson , Ahmed Bouajjani Effective Lossy Queue Languages. [Citation Graph (0, 0)][DBLP ] ICALP, 2001, pp:639-651 [Conf ] Ahmed Bouajjani Languages, Rewriting Systems, and Verification of Infinite-State Systems. [Citation Graph (0, 0)][DBLP ] ICALP, 2001, pp:24-39 [Conf ] Ahmed Bouajjani , Jean-Claude Fernandez , Susanne Graf , Carlos Rodriguez , Joseph Sifakis Safety for Branching Time Semantics. [Citation Graph (0, 0)][DBLP ] ICALP, 1991, pp:76-92 [Conf ] Ahmed Bouajjani , Peter Habermehl Symbolic Reachability Analysis of FIFO Channel Systems with Nonregular Sets of Configurations (Extended Abstract). [Citation Graph (0, 0)][DBLP ] ICALP, 1997, pp:560-570 [Conf ] Eugene Asarin , Ahmed Bouajjani Perturbed Turing Machines and Hybrid Systems. [Citation Graph (0, 0)][DBLP ] LICS, 2001, pp:269-278 [Conf ] Ahmed Bouajjani , Rachid Echahed , Peter Habermehl On the Verification Problem of Nonregular Properties for Nonregular Processes [Citation Graph (0, 0)][DBLP ] LICS, 1995, pp:123-133 [Conf ] Ahmed Bouajjani , Rachid Echahed , Joseph Sifakis On Model Checking for Real-Time Properties with Durations [Citation Graph (0, 0)][DBLP ] LICS, 1993, pp:147-159 [Conf ] Ahmed Bouajjani , Anca Muscholl , Tayssir Touili Permutation Rewriting and Algorithmic Verification. [Citation Graph (0, 0)][DBLP ] LICS, 2001, pp:- [Conf ] Ahmed Bouajjani , Peter Habermehl , Richard Mayr Automatic Verification of Recursive Procedures with One Integer Parameter. [Citation Graph (0, 0)][DBLP ] MFCS, 2001, pp:198-211 [Conf ] Ahmed Bouajjani , Rachid Echahed , Peter Habermehl Verifying Infinite State Processes with Sequential and Parallel Composition. [Citation Graph (0, 0)][DBLP ] POPL, 1995, pp:95-106 [Conf ] Ahmed Bouajjani , Javier Esparza , Tayssir Touili A generic approach to the static analysis of concurrent programs with procedures. [Citation Graph (0, 0)][DBLP ] POPL, 2003, pp:62-73 [Conf ] Ahmed Bouajjani , Susanne Graf , Joseph Sifakis A logig for the description of behaviours and properties of concurrent systems. [Citation Graph (0, 0)][DBLP ] REX Workshop, 1988, pp:398-410 [Conf ] Ahmed Bouajjani , Javier Esparza Rewriting Models of Boolean Programs. [Citation Graph (0, 0)][DBLP ] RTA, 2006, pp:136-150 [Conf ] Ahmed Bouajjani , Tayssir Touili On Computing Reachability Sets of Process Rewrite Systems. [Citation Graph (0, 0)][DBLP ] RTA, 2005, pp:484-499 [Conf ] Ahmed Bouajjani , Stavros Tripakis , Sergio Yovine On-the-fly symbolic model checking for real-time systems. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1997, pp:25-0 [Conf ] Ahmed Bouajjani , Aurore Collomb-Annichini , Yassine Lakhnech , Mihaela Sighireanu Analyzing Fair Parametric Extended Automata. [Citation Graph (0, 0)][DBLP ] SAS, 2001, pp:335-355 [Conf ] Ahmed Bouajjani , Peter Habermehl , Adam Rogalewicz , Tomás Vojnar Abstract Regular Tree Model Checking of Complex Dynamic Data Structures. [Citation Graph (0, 0)][DBLP ] SAS, 2006, pp:52-70 [Conf ] Ahmed Bouajjani , Richard Mayr Model Checking Lossy Vector Addition Systems. [Citation Graph (0, 0)][DBLP ] STACS, 1999, pp:323-333 [Conf ] Parosh Aziz Abdulla , Aurore Annichini , Ahmed Bouajjani Symbolic Verification of Lossy Channel Systems: Application to the Bounded Retransmission Protocol. [Citation Graph (0, 0)][DBLP ] TACAS, 1999, pp:208-222 [Conf ] Ahmed Bouajjani , Peter Habermehl , Pierre Moro , Tomás Vojnar Verifying Programs with Dynamic 1-Selector-Linked Structures in Regular Model Checking. [Citation Graph (0, 0)][DBLP ] TACAS, 2005, pp:13-29 [Conf ] Ahmed Bouajjani , Joseph Sifakis Verification for Finite Systems (Extended Abstract). [Citation Graph (0, 0)][DBLP ] TAPSOFT, Vol.2, 1991, pp:55-57 [Conf ] Ahmed Bouajjani Regular Model Checking for Programs with Dynamic Memory. [Citation Graph (0, 0)][DBLP ] VISSAS, 2005, pp:17-22 [Conf ] Ahmed Bouajjani , Javier Esparza , Tayssir Touili Reachability Analysis of Synchronized PA Systems. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2005, v:138, n:3, pp:153-178 [Journal ] Ahmed Bouajjani , Peter Habermehl , Adam Rogalewicz , Tomás Vojnar Abstract Regular Tree Model Checking. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2006, v:149, n:1, pp:37-48 [Journal ] Ahmed Bouajjani , Axel Legay , Pierre Wolper Handling Liveness Properties in (omega -)Regular Model Checking. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2005, v:138, n:3, pp:101-115 [Journal ] Parosh Aziz Abdulla , Aurore Collomb-Annichini , Ahmed Bouajjani , Bengt Jonsson Using Forward Reachability Analysis for Verification of Lossy Channel Systems. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 2004, v:25, n:1, pp:39-65 [Journal ] Claire Loiseaux , Susanne Graf , Joseph Sifakis , Ahmed Bouajjani , Saddek Bensalem Property Preserving Abstractions for the Verification of Concurrent Systems. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 1995, v:6, n:1, pp:11-44 [Journal ] Stavros Tripakis , Sergio Yovine , Ahmed Bouajjani Checking Timed Büchi Automata Emptiness Efficiently. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 2005, v:26, n:3, pp:267-292 [Journal ] Ahmed Bouajjani , Anca Muscholl , Tayssir Touili Permutation rewriting and algorithmic verification. [Citation Graph (0, 0)][DBLP ] Inf. Comput., 2007, v:205, n:2, pp:199-224 [Journal ] Ahmed Bouajjani , Javier Esparza , Tayssir Touili A Generic Approach to the Static Analysis of Concurrent Programs with Procedures. [Citation Graph (0, 0)][DBLP ] Int. J. Found. Comput. Sci., 2003, v:14, n:4, pp:551-0 [Journal ] Ahmed Bouajjani , Javier Esparza , Alain Finkel , Oded Maler , Peter Rossmanith , Bernard Willems , Pierre Wolper An efficient automata approach to some problems on context-free grammars. [Citation Graph (0, 0)][DBLP ] Inf. Process. Lett., 2000, v:74, n:5-6, pp:221-227 [Journal ] Ahmed Bouajjani , Jean-Claude Fernandez , Nicolas Halbwachs , Pascal Raymond Minimal State Graph Generation. [Citation Graph (0, 0)][DBLP ] Sci. Comput. Program., 1992, v:18, n:3, pp:247-269 [Journal ] Ahmed Bouajjani Preface. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 2001, v:256, n:1-2, pp:1-2 [Journal ] Ahmed Bouajjani , Peter Habermehl Symbolic Reachability Analysis of FIFO-Channel Systems with Nonregular Sets of Configurations. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1999, v:221, n:1-2, pp:211-250 [Journal ] Ahmed Bouajjani , Peter Habermehl , Richard Mayr Automatic verification of recursive procedures with one integer parameter. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 2003, v:1, n:, pp:85-106 [Journal ] Ahmed Bouajjani , Séverine Fratani , Shaz Qadeer Context-Bounded Analysis of Multithreaded Programs with Dynamic Linked Structures. [Citation Graph (0, 0)][DBLP ] CAV, 2007, pp:207-220 [Conf ] Ahmed Bouajjani , Peter Habermehl , Yan Jurski , Mihaela Sighireanu Rewriting Systems with Data. [Citation Graph (0, 0)][DBLP ] FCT, 2007, pp:1-22 [Conf ] Ahmed Bouajjani , Yan Jurski , Mihaela Sighireanu A Generic Framework for Reasoning About Dynamic Networks of Infinite-State Processes. [Citation Graph (0, 0)][DBLP ] TACAS, 2007, pp:690-705 [Conf ] Greta Yorsh , Alexander Rabinovich , Mooly Sagiv , Antoine Meyer , Ahmed Bouajjani A Logic of Reachable Patterns in Linked Data-Structures [Citation Graph (0, 0)][DBLP ] CoRR, 2007, v:0, n:, pp:- [Journal ] Ahmed Bouajjani , Antoine Meyer Symbolic Reachability Analysis of Higher-Order Context-Free Processes [Citation Graph (0, 0)][DBLP ] CoRR, 2007, v:0, n:, pp:- [Journal ] Ahmed Bouajjani , Jan Strejcek , Tayssir Touili On Symbolic Verification of Weakly Extended PAD. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2007, v:175, n:3, pp:47-64 [Journal ] Greta Yorsh , Alexander Rabinovich , Mooly Sagiv , Antoine Meyer , Ahmed Bouajjani A logic of reachable patterns in linked data-structures. [Citation Graph (0, 0)][DBLP ] J. Log. Algebr. Program., 2007, v:73, n:1-2, pp:111-142 [Journal ] Monotonic Abstraction for Programs with Dynamic Memory Heaps. [Citation Graph (, )][DBLP ] Invariant Synthesis for Programs Manipulating Lists with Unbounded Data. [Citation Graph (, )][DBLP ] On the Reachability Analysis of Acyclic Networks of Pushdown Systems. [Citation Graph (, )][DBLP ] A Logic-Based Framework for Reasoning about Composite Data Structures. [Citation Graph (, )][DBLP ] 06081 Abstracts Collection -- Software Verification: Infinite-State Model Checking and Static Program Analysis. [Citation Graph (, )][DBLP ] Reachability analysis of multithreaded software with asynchronous communication. [Citation Graph (, )][DBLP ] 06081 Executive Summary -- Software Verification: Infinite-State Model Checking and Static Program Analysis. [Citation Graph (, )][DBLP ] Analyzing Asynchronous Programs with Preemption. [Citation Graph (, )][DBLP ] On the verification problem for weak memory models. [Citation Graph (, )][DBLP ] Computing Simulations over Tree Automata. [Citation Graph (, )][DBLP ] SDSIrep: A Reputation System Based on SDSI. [Citation Graph (, )][DBLP ] Context-Bounded Analysis for Concurrent Programs with Dynamic Creation of Threads. [Citation Graph (, )][DBLP ] Antichain-Based Universality and Inclusion Testing over Nondeterministic Finite Tree Automata. [Citation Graph (, )][DBLP ] Composed Bisimulation for Tree Automata. [Citation Graph (, )][DBLP ] On the Reachability Problem for Dynamic Networks of Concurrent Pushdown Systems. [Citation Graph (, )][DBLP ] Rewriting Systems over Nested Data Words. [Citation Graph (, )][DBLP ] Parametric Verification of a Group Membership Algorithm [Citation Graph (, )][DBLP ] A Framework to Handle Linear Temporal Properties in (\omega-)Regular Model Checking [Citation Graph (, )][DBLP ] A Generic Framework for Reasoning about Dynamic Networks of Infinite-State Processes [Citation Graph (, )][DBLP ] Search in 0.009secs, Finished in 0.014secs