The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Byron Cook: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Thomas Ball, Byron Cook, Shuvendu K. Lahiri, Lintao Zhang
    Zapato: Automatic Theorem Proving for Predicate Abstraction Refinement. [Citation Graph (0, 0)][DBLP]
    CAV, 2004, pp:457-461 [Conf]
  2. Josh Berdine, Byron Cook, Dino Distefano, Peter W. O'Hearn
    Automatic Termination Proofs for Programs with Shape-Shifting Heaps. [Citation Graph (0, 0)][DBLP]
    CAV, 2006, pp:386-400 [Conf]
  3. Byron Cook, Daniel Kroening, Natasha Sharygina
    Cogent: Accurate Theorem Proving for Program Verification. [Citation Graph (0, 0)][DBLP]
    CAV, 2005, pp:296-300 [Conf]
  4. Byron Cook, Andreas Podelski, Andrey Rybalchenko
    Terminator: Beyond Safety. [Citation Graph (0, 0)][DBLP]
    CAV, 2006, pp:415-418 [Conf]
  5. Andreas Griesmayer, Roderick Bloem, Byron Cook
    Repair of Boolean Programs with an Application to C. [Citation Graph (0, 0)][DBLP]
    CAV, 2006, pp:358-371 [Conf]
  6. Shuvendu K. Lahiri, Randal E. Bryant, Byron Cook
    A Symbolic Approach to Predicate Abstraction. [Citation Graph (0, 0)][DBLP]
    CAV, 2003, pp:141-153 [Conf]
  7. Shuvendu K. Lahiri, Thomas Ball, Byron Cook
    Predicate Abstraction via Symbolic Decision Procedures. [Citation Graph (0, 0)][DBLP]
    CAV, 2005, pp:24-38 [Conf]
  8. Mark Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones
    A Framework for Microprocessor Correctness Statements. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:433-448 [Conf]
  9. Byron Cook, John Launchbury, John Matthews, Richard B. Kieburtz
    Formal Verification of Explicitly Parallel Microprocessors. [Citation Graph (0, 0)][DBLP]
    CHARME, 1999, pp:23-36 [Conf]
  10. Nancy A. Day, Jeffrey R. Lewis, Byron Cook
    Symbolic Simulation of Microprocessor Models using Type Classes in Haskell. [Citation Graph (0, 0)][DBLP]
    CHARME, 1999, pp:346-349 [Conf]
  11. Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna
    A proof engine approach to solving combinational design automation problems. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:725-730 [Conf]
  12. Nancy A. Day, Mark Aagaard, Byron Cook
    Combining Stream-Based and State-Based Verification Techniques. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:126-142 [Conf]
  13. Byron Cook, Daniel Kroening, Natasha Sharygina
    Over-Approximating Boolean Programs with Unbounded Thread Creation. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2006, pp:53-59 [Conf]
  14. John Matthews, Byron Cook, John Launchbury
    Microprocessor Specification in Hawk. [Citation Graph (0, 0)][DBLP]
    ICCL, 1998, pp:90-101 [Conf]
  15. Byron Cook, Georges Gonthier
    Using Stålmarck's Algorithm to Prove Inequalities. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2005, pp:330-344 [Conf]
  16. Byron Cook, John Launchbury
    Disposable Memo Functions (Extended Abstract). [Citation Graph (0, 0)][DBLP]
    ICFP, 1997, pp:310- [Conf]
  17. John Launchbury, Jeffrey R. Lewis, Byron Cook
    On Embedding a Microarchitectural Design Language within Haskell. [Citation Graph (0, 0)][DBLP]
    ICFP, 1999, pp:60-69 [Conf]
  18. Thomas Ball, Byron Cook, Vladimir Levin, Sriram K. Rajamani
    SLAM and Static Driver Verifier: Technology Transfer of Formal Methods inside Microsoft. [Citation Graph (0, 0)][DBLP]
    IFM, 2004, pp:1-20 [Conf]
  19. Byron Cook, Daniel Kroening, Natasha Sharygina
    Accurate Theorem Proving for Program Verification. [Citation Graph (0, 0)][DBLP]
    ISoLA, 2004, pp:96-114 [Conf]
  20. Byron Cook, Andreas Podelski, Andrey Rybalchenko
    Termination proofs for systems code. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:415-426 [Conf]
  21. Josh Berdine, Aziem Chawdhary, Byron Cook, Dino Distefano, Peter W. O'Hearn
    Variance analyses from invariance analyses. [Citation Graph (0, 0)][DBLP]
    POPL, 2007, pp:211-224 [Conf]
  22. Byron Cook, Alexey Gotsman, Andreas Podelski, Andrey Rybalchenko, Moshe Y. Vardi
    Proving that programs eventually do something good. [Citation Graph (0, 0)][DBLP]
    POPL, 2007, pp:265-276 [Conf]
  23. Byron Cook, Andreas Podelski, Andrey Rybalchenko
    Abstraction Refinement for Termination. [Citation Graph (0, 0)][DBLP]
    SAS, 2005, pp:87-101 [Conf]
  24. Alexey Gotsman, Josh Berdine, Byron Cook
    Interprocedural Shape Analysis with Separated Heap Abstractions. [Citation Graph (0, 0)][DBLP]
    SAS, 2006, pp:240-260 [Conf]
  25. Byron Cook, Daniel Kroening, Natasha Sharygina
    Symbolic Model Checking for Asynchronous Boolean Programs. [Citation Graph (0, 0)][DBLP]
    SPIN, 2005, pp:75-90 [Conf]
  26. Thomas Ball, Byron Cook, Satyaki Das, Sriram K. Rajamani
    Refining Approximations in Software Predicate Abstraction. [Citation Graph (0, 0)][DBLP]
    TACAS, 2004, pp:388-403 [Conf]
  27. Thomas Ball, Ella Bounimova, Byron Cook, Vladimir Levin, Jakob Lichtenberg, Con McGarvey, Bohus Ondrusek, Sriram K. Rajamani, Abdullah Ustuner
    Thorough static analysis of device drivers. [Citation Graph (0, 0)][DBLP]
    EuroSys, 2006, pp:73-85 [Conf]
  28. Byron Cook, Scott D. Stoller, Willem Visser
    SoftMC 2003: Workshop on Software Model Checking. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2003, v:89, n:3, pp:- [Journal]
  29. Byron Cook, Scott D. Stoller, Willem Visser
    Preface. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2006, v:144, n:3, pp:1-2 [Journal]
  30. Mark Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones
    A framework for superscalar microprocessor correctness statements. [Citation Graph (0, 0)][DBLP]
    STTT, 2003, v:4, n:3, pp:298-312 [Journal]
  31. Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna
    Design automation with mixtures of proof strategies for propositional logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:8, pp:1042-1048 [Journal]
  32. Byron Cook
    Finding Bugs in Device Drivers with Static Driver Verifier. [Citation Graph (0, 0)][DBLP]
    Abstract State Machines, 2005, pp:71- [Conf]
  33. Josh Berdine, Cristiano Calcagno, Byron Cook, Dino Distefano, Peter W. O'Hearn, Thomas Wies, Hongseok Yang
    Shape Analysis for Composite Data Structures. [Citation Graph (0, 0)][DBLP]
    CAV, 2007, pp:178-192 [Conf]
  34. Byron Cook
    Automatically Proving Program Termination. [Citation Graph (0, 0)][DBLP]
    CAV, 2007, pp:1- [Conf]
  35. Byron Cook
    Bringing Hardware and Software Closer Together with Termination Analysis. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2007, pp:201- [Conf]
  36. Byron Cook, Andreas Podelski, Andrey Rybalchenko
    Proving thread termination. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:320-330 [Conf]
  37. Alexey Gotsman, Josh Berdine, Byron Cook, Mooly Sagiv
    Thread-modular shape analysis. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:266-277 [Conf]
  38. Stephen Magill, Josh Berdine, Edmund M. Clarke, Byron Cook
    Arithmetic Strengthening for Shape Analysis. [Citation Graph (0, 0)][DBLP]
    SAS, 2007, pp:419-436 [Conf]
  39. Roman Manevich, Josh Berdine, Byron Cook, G. Ramalingam, Mooly Sagiv
    Shape Analysis by Graph Decomposition. [Citation Graph (0, 0)][DBLP]
    TACAS, 2007, pp:3-18 [Conf]
  40. Shuvendu K. Lahiri, Thomas Ball, Byron Cook
    Predicate Abstraction via Symbolic Decision Procedures [Citation Graph (0, 0)][DBLP]
    CoRR, 2006, v:0, n:, pp:- [Journal]
  41. Byron Cook, Roberto Sebastiani
    Preface and Foreword. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:174, n:8, pp:3-6 [Journal]

  42. Local Reasoning for Storable Locks and Threads. [Citation Graph (, )][DBLP]


  43. Scalable Shape Analysis for Systems Code. [Citation Graph (, )][DBLP]


  44. Proving Conditional Termination. [Citation Graph (, )][DBLP]


  45. 07401 Abstracts Collection -- Deduction and Decision Procedures. [Citation Graph (, )][DBLP]


  46. 07401 Executive Summary -- Deduction and Decision Procedures. [Citation Graph (, )][DBLP]


  47. Ranking Abstractions. [Citation Graph (, )][DBLP]


  48. Finding heap-bounds for hardware synthesis. [Citation Graph (, )][DBLP]


  49. Taming the Unbounded for Hardware Synthesis. [Citation Graph (, )][DBLP]


  50. Finding API usage rule violations in Windows device drivers using Static Driver Verifier. [Citation Graph (, )][DBLP]


  51. Proving that non-blocking algorithms don't block. [Citation Graph (, )][DBLP]


  52. Proving Termination by Divergence. [Citation Graph (, )][DBLP]


  53. Automatically Proving Concurrent Programs Correct. [Citation Graph (, )][DBLP]


  54. Ranking Function Synthesis for Bit-Vector Relations. [Citation Graph (, )][DBLP]


  55. Advances in Program Termination and Liveness. [Citation Graph (, )][DBLP]


  56. Software engineering and formal methods. [Citation Graph (, )][DBLP]


Search in 0.004secs, Finished in 0.176secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002