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Serdar Tasiran: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

Rajeev Alur, Thomas A. Henzinger, Freddy Y. C. Mang, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran
MOCHA: Modularity in Model Checking. [Citation Graph (0, 0)][DBLP]
CAV, 1998, pp:521-525 [Conf]
Serdar Tasiran, Robert K. Brayton
STARI: A Case Study in Compositional and Hierarchical Timing Verification. [Citation Graph (0, 0)][DBLP]
CAV, 1997, pp:191-201 [Conf]
Serdar Tasiran, Ramin Hojati, Robert K. Brayton
Language containment of non-deterministic omega-automata. [Citation Graph (0, 0)][DBLP]
CHARME, 1995, pp:261-277 [Conf]
Serdar Tasiran, Rajeev Alur, Robert P. Kurshan, Robert K. Brayton
Verifying Abstractions of Timed Systems. [Citation Graph (0, 0)][DBLP]
CONCUR, 1996, pp:546-562 [Conf]
Adnan Aziz, Serdar Tasiran, Robert K. Brayton
BDD Variable Ordering for Interacting Finite State Machines. [Citation Graph (0, 0)][DBLP]
DAC, 1994, pp:283-288 [Conf]
Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
HSIS: A BDD-Based Environment for Formal Verification. [Citation Graph (0, 0)][DBLP]
DAC, 1994, pp:454-459 [Conf]
Serdar Tasiran, Yuan Yu, Brannon Batson
Using a formal specification and a model checker to monitor and direct simulation. [Citation Graph (0, 0)][DBLP]
DAC, 2003, pp:356-361 [Conf]
Soner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici
Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in multi-core systems. [Citation Graph (0, 0)][DBLP]
ESTImedia, 2005, pp:135-140 [Conf]
Tayfun Elmas, Shaz Qadeer, Serdar Tasiran
Goldilocks: Efficiently Computing the Happens-Before Relation Using Locksets. [Citation Graph (0, 0)][DBLP]
FATES/RV, 2006, pp:193-208 [Conf]
Serdar Tasiran, Tayfun Elmas, Guven Bolukbasi, M. Erkan Keremoglu
A Novel Test Coverage Metric for Concurrently-Accessed Software Components. [Citation Graph (0, 0)][DBLP]
FATES, 2005, pp:62-71 [Conf]
Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran
An Assume-Guarantee Rule for Checking Simulation. [Citation Graph (0, 0)][DBLP]
FMCAD, 1998, pp:421-432 [Conf]
Ellen Sentovich, David L. Dill, Serdar Tasiran
Formal verification meets simulation (tutorial abstract). [Citation Graph (0, 0)][DBLP]
ICCAD, 1999, pp:221- [Conf]
Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage. [Citation Graph (0, 0)][DBLP]
ICCD, 2001, pp:82-88 [Conf]
Shaz Qadeer, Serdar Tasiran
Promising Directions in Hardware Design Verification (invited). [Citation Graph (0, 0)][DBLP]
ISQED, 2002, pp:381-387 [Conf]
Tayfun Elmas, Serdar Tasiran, Shaz Qadeer
VYRD: verifYing concurrent programs by runtime refinement-violation detection. [Citation Graph (0, 0)][DBLP]
PLDI, 2005, pp:27-37 [Conf]
Serdar Tasiran, Kurt Keutzer
Coverage Metrics for Functional Validation of Hardware Designs. [Citation Graph (0, 0)][DBLP]
IEEE Design & Test of Computers, 2001, v:18, n:4, pp:36-45 [Journal]
Serdar Tasiran, Yuan Yu, Brannon Batson
Linking Simulation with Formal Verification at a Higher Level. [Citation Graph (0, 0)][DBLP]
IEEE Design & Test of Computers, 2004, v:21, n:6, pp:472-482 [Journal]
Tayfun Elmas, Serdar Tasiran
VyrdMC: Driving Runtime Refinement Checking with Model Checkers. [Citation Graph (0, 0)][DBLP]
Electr. Notes Theor. Comput. Sci., 2006, v:144, n:4, pp:41-56 [Journal]
Serdar Tasiran, Shaz Qadeer
Runtime Refinement Checking of Concurrent Data Structures. [Citation Graph (0, 0)][DBLP]
Electr. Notes Theor. Comput. Sci., 2005, v:113, n:, pp:163-179 [Journal]
Rajeev Joshi, Leslie Lamport, John Matthews, Serdar Tasiran, Mark R. Tuttle, Yuan Yu
Checking Cache-Coherence Protocols with TLA⁺. [Citation Graph (0, 0)][DBLP]
Formal Methods in System Design, 2003, v:22, n:2, pp:125-131 [Journal]
Tamara Munzner, François Guimbretière, Serdar Tasiran, Li Zhang, Yunhong Zhou
TreeJuxtaposer: scalable tree comparison using Focus+Context with guaranteed visibility. [Citation Graph (0, 0)][DBLP]
ACM Trans. Graph., 2003, v:22, n:3, pp:453-462 [Journal]
Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran
An assume-guarantee rule for checking simulation. [Citation Graph (0, 0)][DBLP]
ACM Trans. Program. Lang. Syst., 2002, v:24, n:1, pp:51-64 [Journal]
Tayfun Elmas, Shaz Qadeer, Serdar Tasiran
Goldilocks: a race and transaction-aware java runtime. [Citation Graph (0, 0)][DBLP]
PLDI, 2007, pp:245-255 [Conf]
A classification of concurrency bugs in java benchmarks by developer intent. [Citation Graph (, )][DBLP]
An annotation assistant for interactive debugging of programs with common synchronization idioms. [Citation Graph (, )][DBLP]
A calculus of atomic actions. [Citation Graph (, )][DBLP]
Simplifying Linearizability Proofs with Reduction and Abstraction. [Citation Graph (, )][DBLP]
Rollback Atomicity. [Citation Graph (, )][DBLP]
Tressa: Claiming the Future. [Citation Graph (, )][DBLP]
Fast Monte Carlo Estimation of Timing Yield: Importance Sampling with Stochastic Logical Effort (ISLE) [Citation Graph (, )][DBLP]

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