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Jason Baumgartner: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz
    Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists. [Citation Graph (0, 0)][DBLP]
    CAV, 1999, pp:72-83 [Conf]
  2. Jason Baumgartner, Andreas Kuehlmann, Jacob A. Abraham
    Property Checking via Structural Analysis. [Citation Graph (0, 0)][DBLP]
    CAV, 2002, pp:151-165 [Conf]
  3. Jason Baumgartner, Anson Tripp, Adnan Aziz, Vigyan Singhal, Flemming Andersen
    An Abstraction Algorithm for the Verification of Generalized C-Slow Designs. [Citation Graph (0, 0)][DBLP]
    CAV, 2000, pp:5-19 [Conf]
  4. Andreas Kuehlmann, Jason Baumgartner
    Transformation-Based Verification Using Generalized Retiming. [Citation Graph (0, 0)][DBLP]
    CAV, 2001, pp:104-117 [Conf]
  5. Hari Mony, Jason Baumgartner, Adnan Aziz
    Exploiting Constraints in Transformation-Based Verification. [Citation Graph (0, 0)][DBLP]
    CHARME, 2005, pp:269-284 [Conf]
  6. Jason Baumgartner, Hari Mony
    Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies. [Citation Graph (0, 0)][DBLP]
    CHARME, 2005, pp:222-237 [Conf]
  7. Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman
    Exploiting suspected redundancy without proving it. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:463-466 [Conf]
  8. Jason Baumgartner, Andreas Kuehlmann
    Enhanced Diameter Bounding via Structural. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:36-41 [Conf]
  9. Christian Jacobi 0002, Kai Weber, Viresh Paruthi, Jason Baumgartner
    Automatic Formal Verification of Fused-Multiply-Add FPUs. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1298-1303 [Conf]
  10. Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman, Andreas Kuehlmann
    Scalable Automated Verification via Expert-System Guided Transformations. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2004, pp:159-173 [Conf]
  11. Tilman Glökler, Jason Baumgartner, Devi Shanmugam, A. E. (Rick) Seigler, Gary A. Van Huben, Barinjato Ramanandray, Hari Mony, Paul Roessler
    Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2006, pp:3-10 [Conf]
  12. Jason Baumgartner, Andreas Kuehlmann
    Min-Area Retiming on Dynamic Circuit Structures. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:176-182 [Conf]
  13. Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz
    Scalable compositional minimization via static analysis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:1060-1067 [Conf]
  14. Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz
    An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2003, v:23, n:1, pp:39-65 [Journal]
  15. Rebecca M. Gott, Jason Baumgartner, Paul Roessler, S. I. Joe
    Functional formal verification on designs of pSeries microprocessors and communication subsystems. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2005, v:49, n:4-5, pp:565-580 [Journal]
  16. John M. Ludden, Wolfgang Roesner, Gerry M. Heiling, John R. Reysa, Jonathan R. Jackson, Bing-Lun Chu, Michael L. Behm, Jason Baumgartner, Richard D. Peterson, Jamee Abdulhafiz, William E. Bucy, John H. Klaus, Danny J. Klema, Tien N. Le, F. Danette Lewis, Philip E. Milling, Lawrence A. McConville, Bradley S. Nelson, Viresh Paruthi, Travis W. Pouarz, Audre D. Romonosky, Jeff Stuecheli, Kent D. Thompson, Dave W. Victor, Bruce Wile
    Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2002, v:46, n:1, pp:53-76 [Journal]
  17. Thuyen Le, Tilman Glökler, Jason Baumgartner
    Formal verification of a pervasive interconnect bus system in a high-performance microprocessor. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:219-224 [Conf]
  18. Nadeem Malik, Jason Baumgartner, S. Roberts, R. Dobson
    A toolset for assisted formal verification. [Citation Graph (0, 0)][DBLP]
    IPCCC, 1999, pp:489-492 [Conf]

  19. Speculative reduction-based scalable redundancy identification. [Citation Graph (, )][DBLP]


  20. Scalable liveness checking via property-preserving transformations. [Citation Graph (, )][DBLP]


  21. Enhanced verification by temporal decomposition. [Citation Graph (, )][DBLP]


  22. Optimal Constraint-Preserving Netlist Simplification. [Citation Graph (, )][DBLP]


  23. Scalable conditional equivalence checking: An automated invariant-generation based approach. [Citation Graph (, )][DBLP]


  24. Invariant-Strengthened Elimination of Dependent State Elements. [Citation Graph (, )][DBLP]


  25. Scalable Sequential Equivalence Checking across Arbitrary Design Transformations . [Citation Graph (, )][DBLP]


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