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Marius Bozga:
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Publications of Author
- Ahmed Bouajjani, Marius Bozga, Peter Habermehl, Radu Iosif, Pierre Moro, Tomás Vojnar
Programs with Lists Are Counter Automata. [Citation Graph (0, 0)][DBLP] CAV, 2006, pp:517-531 [Conf]
- Marius Bozga, Conrado Daws, Oded Maler, Alfredo Olivero, Stavros Tripakis, Sergio Yovine
Kronos: A Model-Checking Tool for Real-Time Systems. [Citation Graph (0, 0)][DBLP] CAV, 1998, pp:546-550 [Conf]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu, Susanne Graf, Jean-Pierre Krimm, Laurent Mounier
IF: A Validation Environment for Timed Asynchronous Systems. [Citation Graph (0, 0)][DBLP] CAV, 2000, pp:543-547 [Conf]
- Marius Bozga, Susanne Graf, Laurent Mounier
IF-2.0: A Validation Environment for Component-Based Real-Time Systems. [Citation Graph (0, 0)][DBLP] CAV, 2002, pp:343-348 [Conf]
- Marius Bozga, Oded Maler
On the Representation of Probabilities over Structured Domains. [Citation Graph (0, 0)][DBLP] CAV, 1999, pp:261-273 [Conf]
- Marius Bozga, Oded Maler, Amir Pnueli, Sergio Yovine
Some Progress in the Symbolic Verification of Timed Automata. [Citation Graph (0, 0)][DBLP] CAV, 1997, pp:179-190 [Conf]
- Marius Bozga, Oded Maler, Stavros Tripakis
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics. [Citation Graph (0, 0)][DBLP] CHARME, 1999, pp:125-141 [Conf]
- Ramzi Ben Salah, Marius Bozga, Oded Maler
On Interleaving in Timed Automata. [Citation Graph (0, 0)][DBLP] CONCUR, 2006, pp:465-476 [Conf]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu, Susanne Graf, Jean-Pierre Krimm, Laurent Mounier
IF: An Intermediate Representation and Validation Environment for Timed Asynchronous Systems. [Citation Graph (0, 0)][DBLP] World Congress on Formal Methods, 1999, pp:307-327 [Conf]
- Ramzi Ben Salah, Marius Bozga, Oded Maler
On Timing Analysis of Combinational Circuits. [Citation Graph (0, 0)][DBLP] FORMATS, 2003, pp:204-219 [Conf]
- Marius Bozga, Radu Iosif
On Decidability Within the Arithmetic of Addition and Divisibility. [Citation Graph (0, 0)][DBLP] FoSSaCS, 2005, pp:425-439 [Conf]
- Marius Bozga, Conrado Daws, Oded Maler, Alfredo Olivero, Stavros Tripakis, Sergio Yovine
KRONOS: A Model-Checking Tool for Real-Time Systems (Tool-Presentation for FTRTFT '98). [Citation Graph (0, 0)][DBLP] FTRTFT, 1998, pp:298-302 [Conf]
- Peter Niebert, Moez Mahfoudh, Eugene Asarin, Marius Bozga, Oded Maler, Navendu Jain
Verification of Timed Automata via Satisfiability Checking. [Citation Graph (0, 0)][DBLP] FTRTFT, 2002, pp:225-244 [Conf]
- Eugene Asarin, Marius Bozga, Alain Kerbrat, Oded Maler, Amir Pnueli, Anne Rasse
Data-Structures for the Verification of Timed Automata. [Citation Graph (0, 0)][DBLP] HART, 1997, pp:346-360 [Conf]
- Marius Bozga, Radu Iosif, Yassine Lakhnech
Flat Parametric Counter Automata. [Citation Graph (0, 0)][DBLP] ICALP (2), 2006, pp:577-588 [Conf]
- Marius Bozga, Susanne Graf, Laurent Mounier
Automated Validation of Distributed Software Using the IF Environment. [Citation Graph (0, 0)][DBLP] NCA, 2001, pp:268-275 [Conf]
- Marius Bozga, Radu Iosif, Yassine Lakhnech
Storeless semantics and alias logic. [Citation Graph (0, 0)][DBLP] PEPM, 2003, pp:55-65 [Conf]
- Marius Bozga, Abdelkarim Kerbaa, Oded Maler
Scheduling Acyclic Branching Programs on Parallel Machines. [Citation Graph (0, 0)][DBLP] RTSS, 2004, pp:208-217 [Conf]
- Marius Bozga, Susanne Graf, Alain Kerbrat, Laurent Mounier, Iulian Ober, Daniel Vincent
SDL for Real-Time: What is Missing? [Citation Graph (0, 0)][DBLP] SAM, 2000, pp:108-0 [Conf]
- Marius Bozga, Radu Iosif, Yassine Lakhnech
On Logics of Aliasing. [Citation Graph (0, 0)][DBLP] SAS, 2004, pp:344-360 [Conf]
- Saddek Bensalem, Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu, Yassine Lakhnech
A Transformational Approach for Generating Non-linear Invariants. [Citation Graph (0, 0)][DBLP] SAS, 2000, pp:58-74 [Conf]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu
State Space Reduction Based on Live Variables Analysis. [Citation Graph (0, 0)][DBLP] SAS, 1999, pp:164-178 [Conf]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu, Susanne Graf, Jean-Pierre Krimm, Laurent Mounier, Joseph Sifakis
IF: An intermediate representation for SDL and its applications. [Citation Graph (0, 0)][DBLP] SDL Forum, 1999, pp:423-440 [Conf]
- Marius Bozga, Susanne Graf, Laurent Mounier, Iulian Ober, Jean-Luc Roux, Daniel Vincent
Timed Extensions for SDL. [Citation Graph (0, 0)][DBLP] SDL Forum, 2001, pp:223-240 [Conf]
- Ananda Basu, Marius Bozga, Joseph Sifakis
Modeling Heterogeneous Real-time Components in BIP. [Citation Graph (0, 0)][DBLP] SEFM, 2006, pp:3-12 [Conf]
- Marius Bozga, Susanne Graf, Ileana Ober, Iulian Ober, Joseph Sifakis
The IF Toolset. [Citation Graph (0, 0)][DBLP] SFM, 2004, pp:237-267 [Conf]
- Marius Bozga, Susanne Graf, Laurent Mounier, Iulian Ober
IF Validation Environment Tutorial. [Citation Graph (0, 0)][DBLP] SPIN, 2004, pp:306-307 [Conf]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu
Using Static Analysis to Improve Automatic Test Generation. [Citation Graph (0, 0)][DBLP] TACAS, 2000, pp:235-250 [Conf]
- Saddek Bensalem, Marius Bozga, Moez Krichen, Stavros Tripakis
Testing Conformance of Real-Time Applications by Automatic Generation of Observers. [Citation Graph (0, 0)][DBLP] Electr. Notes Theor. Comput. Sci., 2005, v:113, n:, pp:23-43 [Journal]
- Marius Bozga, Susanne Graf, Laurent Mounier
Automated validation of distributed software using the IF environment. [Citation Graph (0, 0)][DBLP] Electr. Notes Theor. Comput. Sci., 2001, v:55, n:3, pp:- [Journal]
- Marius Bozga, Hou Jianmin, Oded Maler, Sergio Yovine
Verification of Asynchronous Circuits using Timed Automata. [Citation Graph (0, 0)][DBLP] Electr. Notes Theor. Comput. Sci., 2002, v:65, n:6, pp:- [Journal]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu, Claude Jard, Thierry Jéron, Alain Kerbrat, Pierre Morel, Laurent Mounier
Verification and test generation for the SSCOP protocol. [Citation Graph (0, 0)][DBLP] Sci. Comput. Program., 2000, v:36, n:1, pp:27-52 [Journal]
- Jean-Claude Fernandez, Marius Bozga, Lucian Ghirvu
State space reduction based on live variables analysis. [Citation Graph (0, 0)][DBLP] Sci. Comput. Program., 2003, v:47, n:2-3, pp:203-220 [Journal]
- Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu
Using static analysis to improve automatic test generation. [Citation Graph (0, 0)][DBLP] STTT, 2003, v:4, n:2, pp:142-152 [Journal]
- Marius Bozga, Jean-Claude Fernandez, Alain Kerbrat, Laurent Mounier
Protocol Verification with the ALDÉBARAN Toolset. [Citation Graph (0, 0)][DBLP] STTT, 1997, v:1, n:1-2, pp:166-184 [Journal]
Compositional Verification for Component-Based Systems and Application. [Citation Graph (, )][DBLP]
Methods for Knowledge Based Controlling of Distributed Systems. [Citation Graph (, )][DBLP]
Quantitative Separation Logic and Programs with Lists. [Citation Graph (, )][DBLP]
Automatic Verification of Integer Array Programs. [Citation Graph (, )][DBLP]
D-Finder: A Tool for Compositional Deadlock Detection and Verification. [Citation Graph (, )][DBLP]
Fast Acceleration of Ultimately Periodic Relations. [Citation Graph (, )][DBLP]
Modeling synchronous systems in BIP. [Citation Graph (, )][DBLP]
Compositional timing analysis. [Citation Graph (, )][DBLP]
Distributed Semantics and Implementation for Systems with Interaction and Priority. [Citation Graph (, )][DBLP]
Statistical Abstraction and Model-Checking of Large Heterogeneous Systems. [Citation Graph (, )][DBLP]
Translating AADL into BIP - Application to the Verification of Real-Time Systems. [Citation Graph (, )][DBLP]
On timed components and their abstraction. [Citation Graph (, )][DBLP]
Systematic Correct Construction of Self-stabilizing Systems: A Case Study. [Citation Graph (, )][DBLP]
Iterating Octagons. [Citation Graph (, )][DBLP]
On Flat Programs with Lists. [Citation Graph (, )][DBLP]
Brief Announcement: Incremental Component-Based Modeling, Verification, and Performance Evaluation of Distributed Reset. [Citation Graph (, )][DBLP]
Source-to-source architecture transformation for performance optimization in BIP. [Citation Graph (, )][DBLP]
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