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Publications of Author

1. Patricia Bouyer, Deepak D'Souza, P. Madhusudan, Antoine Petit
   Timed Control with Partial Observability. [Citation Graph (0, 0)][DBLP]
   CAV, 2003, pp:180-192 [Conf]
   
2. Pavithra Prabhakar, Deepak D'Souza
   On the Expressiveness of MTL with Past Operators. [Citation Graph (0, 0)][DBLP]
   FORMATS, 2006, pp:322-336 [Conf]
   
3. Deepak D'Souza, Nicolas Tabareau
   On Timed Automata with Input-Determined Guards. [Citation Graph (0, 0)][DBLP]
   FORMATS/FTRTFT, 2004, pp:68-83 [Conf]
   
4. Patricia Bouyer, Fabrice Chevalier, Deepak D'Souza
   Fault Diagnosis Using Timed Automata. [Citation Graph (0, 0)][DBLP]
   FoSSaCS, 2005, pp:219-233 [Conf]
   
5. Fabrice Chevalier, Deepak D'Souza, Pavithra Prabhakar
   On Continuous Timed Automata with Input-Determined Guards. [Citation Graph (0, 0)][DBLP]
   FSTTCS, 2006, pp:369-380 [Conf]
   
6. Deepak D'Souza, M. Raj Mohan
   Eventual Timed Automata. [Citation Graph (0, 0)][DBLP]
   FSTTCS, 2005, pp:322-334 [Conf]
   
7. Deepak D'Souza, P. S. Thiagarajan
   Product Interval Automata: A Subclass of Timed Automata. [Citation Graph (0, 0)][DBLP]
   FSTTCS, 1999, pp:60-71 [Conf]
   
8. Stéphane Demri, Deepak D'Souza
   An Automata-Theoretic Approach to Constraint LTL. [Citation Graph (0, 0)][DBLP]
   FSTTCS, 2002, pp:121-132 [Conf]
   
9. Deepak D'Souza
   A Logical Characterisation of Event Recording Automata. [Citation Graph (0, 0)][DBLP]
   FTRTFT, 2000, pp:240-251 [Conf]
   
10. Deepak D'Souza, Madhu Gopinathan
    Computing Complete Test Graphs for Hierarchical Systems. [Citation Graph (0, 0)][DBLP]
    SEFM, 2006, pp:70-79 [Conf]
    
11. Deepak D'Souza, Madhavan Mukund
    Checking Consistency of SDL+MSC Specifications. [Citation Graph (0, 0)][DBLP]
    SPIN, 2003, pp:151-165 [Conf]
    
12. Deepak D'Souza, P. Madhusudan
    Timed Control Synthesis for External Specifications. [Citation Graph (0, 0)][DBLP]
    STACS, 2002, pp:571-582 [Conf]
    
13. Deepak D'Souza, K. R. Raghavendra, Barbara Sprick
    An Automata Based Approach for Verifying Information Flow Properties. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:135, n:1, pp:39-58 [Journal]
    
14. Deepak D'Souza
    A Logical Characterisation of Event Clock Automata. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2003, v:14, n:4, pp:625-640 [Journal]
    
15. Fabrice Chevalier, Deepak D'Souza, Pavithra Prabhakar
    Counter-Free Input-Determined Timed Automata. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2007, pp:82-97 [Conf]
    
16. Stéphane Demri, Deepak D'Souza, Régis Gascon
    A Decidable Temporal Logic of Repeating Values. [Citation Graph (0, 0)][DBLP]
    LFCS, 2007, pp:180-194 [Conf]
    
17. Deepak D'Souza, Nicolas Tabareau
    On timed automata with input-determined guards [Citation Graph (0, 0)][DBLP]
    CoRR, 2006, v:0, n:, pp:- [Journal]
    
18. Stéphane Demri, Deepak D'Souza
    An automata-theoretic approach to constraint LTL. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 2007, v:205, n:3, pp:380-415 [Journal]
    
19. Deepak D'Souza, Pavithra Prabhakar
    On the expressiveness of MTL in the pointwise and continuous semantics. [Citation Graph (0, 0)][DBLP]
    STTT, 2007, v:9, n:1, pp:1-4 [Journal]
    
20. 
    Conflict-Tolerant Features. [Citation Graph (, )][DBLP]
    
    
21. 
    On the Decidability of Model-Checking Information Flow Properties. [Citation Graph (, )][DBLP]
    
    
22. 
    Java memory model aware software validation. [Citation Graph (, )][DBLP]
    
    
23. 
    Conflict-Tolerant Real-Time Features. [Citation Graph (, )][DBLP]
    
    
24. 
    Automata and logics over finitely varying functions. [Citation Graph (, )][DBLP]
    
    
25. 
    A Case Study in Matching Service Descriptions to Implementations in an Existing System [Citation Graph (, )][DBLP]