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Rajeev K. Ranjan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
    VIS: A System for Verification and Synthesis. [Citation Graph (0, 0)][DBLP]
    CAV, 1996, pp:428-432 [Conf]
  2. Thomas R. Shiple, James H. Kukula, Rajeev K. Ranjan
    A Comparison of Presburger Engines for EFSM Reachability. [Citation Graph (0, 0)][DBLP]
    CAV, 1998, pp:280-292 [Conf]
  3. Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    HSIS: A BDD-Based Environment for Formal Verification. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:454-459 [Conf]
  4. David L. Dill, Nate James, Shishpal Rawat, Gérard Berry, Limor Fix, Harry Foster, Rajeev K. Ranjan, Gunnar Stålmarck, Curt Widdoes
    Formal verification methods: getting around the brick wall. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:576-577 [Conf]
  5. Jagesh V. Sanghavi, Rajeev K. Ranjan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    High Performance BDD Package By Exploiting Memory Hiercharchy. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:635-640 [Conf]
  6. Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton
    Using Combinational Verification for Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:138-144 [Conf]
  7. Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
    VIS. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:248-256 [Conf]
  8. Bwolen Yang, Randal E. Bryant, David R. O'Hallaron, Armin Biere, Olivier Coudert, Geert Janssen, Rajeev K. Ranjan, Fabio Somenzi
    A Performance Study of BDD-Based Model Checking. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1998, pp:255-289 [Conf]
  9. Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton
    On the optimization power of retiming and resynthesis transformations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:402-407 [Conf]
  10. Amit Mehrotra, Shaz Qadeer, Rajeev K. Ranjan, Randy H. Katz
    Benchmarking and Analysis of Architectures for CAD Applications. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:670-675 [Conf]
  11. Rajeev K. Ranjan, Wilsin Gosti, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:344-351 [Conf]
  12. Rajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Binary decision diagrams on network of workstation. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:358-364 [Conf]

  13. Beyond verification: leveraging formal for debugging. [Citation Graph (, )][DBLP]


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