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Natasha Sharygina:
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Publications of Author
- Sagar Chaki, James Ivers, Natasha Sharygina, Kurt C. Wallnau
The ComFoRT Reasoning Framework. [Citation Graph (0, 0)][DBLP] CAV, 2005, pp:164-169 [Conf]
- Byron Cook, Daniel Kroening, Natasha Sharygina
Cogent: Accurate Theorem Proving for Program Verification. [Citation Graph (0, 0)][DBLP] CAV, 2005, pp:296-300 [Conf]
- Himanshu Jain, Daniel Kroening, Natasha Sharygina, Edmund M. Clarke
Word level predicate abstraction and refinement for verifying RTL verilog. [Citation Graph (0, 0)][DBLP] DAC, 2005, pp:445-450 [Conf]
- Natasha Sharygina, James C. Browne
Model Checking Software via Abstraction of Loop Transitions. [Citation Graph (0, 0)][DBLP] FASE, 2003, pp:325-340 [Conf]
- Natasha Sharygina, James C. Browne, Robert P. Kurshan
A Formal Object-Oriented Analysis for Software Reliability: Design for Verification. [Citation Graph (0, 0)][DBLP] FASE, 2001, pp:318-332 [Conf]
- Natasha Sharygina, Sagar Chaki, Edmund M. Clarke, Nishant Sinha
Dynamic Component Substitutability Analysis. [Citation Graph (0, 0)][DBLP] FM, 2005, pp:512-528 [Conf]
- Natasha Sharygina, Doron Peled
A Combined Testing and Verification Approach for Software Reliability. [Citation Graph (0, 0)][DBLP] FME, 2001, pp:611-628 [Conf]
- Byron Cook, Daniel Kroening, Natasha Sharygina
Over-Approximating Boolean Programs with Unbounded Thread Creation. [Citation Graph (0, 0)][DBLP] FMCAD, 2006, pp:53-59 [Conf]
- Edmund M. Clarke, Natasha Sharygina, Nishant Sinha
Program Compatibility Approaches. [Citation Graph (0, 0)][DBLP] FMCO, 2005, pp:243-258 [Conf]
- Sagar Chaki, Edmund M. Clarke, Orna Grumberg, Joël Ouaknine, Natasha Sharygina, Tayssir Touili, Helmut Veith
State/Event Software Verification for Branching-Time Specifications. [Citation Graph (0, 0)][DBLP] IFM, 2005, pp:53-69 [Conf]
- Sagar Chaki, Edmund M. Clarke, Joël Ouaknine, Natasha Sharygina, Nishant Sinha
State/Event-Based Software Model Checking. [Citation Graph (0, 0)][DBLP] IFM, 2004, pp:128-147 [Conf]
- Byron Cook, Daniel Kroening, Natasha Sharygina
Accurate Theorem Proving for Program Verification. [Citation Graph (0, 0)][DBLP] ISoLA, 2004, pp:96-114 [Conf]
- Sagar Chaki, Edmund M. Clarke, Joël Ouaknine, Natasha Sharygina
Automated, compositional and iterative deadlock detection. [Citation Graph (0, 0)][DBLP] MEMOCODE, 2004, pp:201-210 [Conf]
- Daniel Kroening, Natasha Sharygina
Formal verification of SystemC by automatic hardware/software partitioning. [Citation Graph (0, 0)][DBLP] MEMOCODE, 2005, pp:101-110 [Conf]
- Byron Cook, Daniel Kroening, Natasha Sharygina
Symbolic Model Checking for Asynchronous Boolean Programs. [Citation Graph (0, 0)][DBLP] SPIN, 2005, pp:75-90 [Conf]
- Edmund M. Clarke, Daniel Kroening, Natasha Sharygina, Karen Yorav
SATABS: SAT-Based Predicate Abstraction for ANSI-C. [Citation Graph (0, 0)][DBLP] TACAS, 2005, pp:570-574 [Conf]
- Daniel Kroening, Natasha Sharygina
Approximating Predicate Images for Bit-Vector Logic. [Citation Graph (0, 0)][DBLP] TACAS, 2006, pp:242-256 [Conf]
- Sagar Chaki, Edmund M. Clarke, Joël Ouaknine, Natasha Sharygina, Nishant Sinha
Concurrent software verification with states, events, and deadlocks. [Citation Graph (0, 0)][DBLP] Formal Asp. Comput., 2005, v:17, n:4, pp:461-483 [Journal]
- Edmund M. Clarke, Daniel Kroening, Natasha Sharygina, Karen Yorav
Predicate Abstraction of ANSI-C Programs Using SAT. [Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 2004, v:25, n:2-3, pp:105-127 [Journal]
- Natasha Sharygina
Guest Editorial. [Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 2004, v:25, n:2-3, pp:103-103 [Journal]
- Natasha Sharygina, James C. Browne, Fei Xie, Robert P. Kurshan, Vladimir Levin
Lessons Learned from Model Checking a NASA Robot Controller. [Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 2004, v:25, n:2-3, pp:241-270 [Journal]
- Daniel Kroening, Natasha Sharygina
Interactive presentation: Image computation and predicate refinement for RTL verilog using word level proofs. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:1325-1330 [Conf]
- Chiara Braghin, Natasha Sharygina, Katerina Barone-Adesi
Automated Verification of Security Policies in Mobile Code. [Citation Graph (0, 0)][DBLP] IFM, 2007, pp:37-53 [Conf]
- Jonathan Aldrich, Mike Barnett, Dimitra Giannakopoulou, Gary T. Leavens, Natasha Sharygina
Specification and verification of component-based systems 2007. [Citation Graph (0, 0)][DBLP] ESEC/SIGSOFT FSE, 2007, pp:609-610 [Conf]
- Himanshu Jain, Daniel Kroening, Natasha Sharygina, Edmund M. Clarke
VCEGAR: Verilog CounterExample Guided Abstraction Refinement. [Citation Graph (0, 0)][DBLP] TACAS, 2007, pp:583-586 [Conf]
Loop Summarization Using Abstract Transformers. [Citation Graph (, )][DBLP]
Termination Analysis with Compositional Transition Invariants. [Citation Graph (, )][DBLP]
A scalable decision procedure for fixed-width bit-vectors. [Citation Graph (, )][DBLP]
Loopfrog: A Static Analyzer for ANSI-C Programs. [Citation Graph (, )][DBLP]
The synergy of precise and fast abstractions for program verification. [Citation Graph (, )][DBLP]
Specification and verification of component-based systems 2007. [Citation Graph (, )][DBLP]
Scoot: A Tool for the Analysis of SystemC Models. [Citation Graph (, )][DBLP]
The OpenSMT Solver. [Citation Graph (, )][DBLP]
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