The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Viktor Gyuris: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Viktor Gyuris, A. Prasad Sistla
    On-the-Fly Model Checking Under Fairness That Exploits Symmetry. [Citation Graph (0, 0)][DBLP]
    CAV, 1997, pp:232-243 [Conf]
  2. A. Prasad Sistla, L. Miliades, Viktor Gyuris
    SMC: A Symmetry Based Model Checker for Verification of Liveness Properties. [Citation Graph (0, 0)][DBLP]
    CAV, 1997, pp:464-467 [Conf]
  3. A. Prasad Sistla, Viktor Gyuris
    Parameterized Verification of Linear Networks using Automata as Invariants. [Citation Graph (0, 0)][DBLP]
    Formal Asp. Comput., 1999, v:11, n:4, pp:402-425 [Journal]
  4. Viktor Gyuris, A. Prasad Sistla
    On-the-Fly Model Checking Under Fairness that Exploits Symmetry. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1999, v:15, n:3, pp:217-238 [Journal]
  5. Ildikó Sain, Viktor Gyuris
    Finite Schematizable Algebraic Logic. [Citation Graph (0, 0)][DBLP]
    Logic Journal of the IGPL, 1997, v:5, n:5, pp:- [Journal]
  6. Viktor Gyuris
    A Short Proof of Representability of Fork Algebras. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1997, v:188, n:1-2, pp:211-220 [Journal]
  7. A. Prasad Sistla, Viktor Gyuris, E. Allen Emerson
    SMC: a symmetry-based model checker for verification of safety and liveness properties. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 2000, v:9, n:2, pp:133-166 [Journal]

Search in 0.003secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002