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Viktor Gyuris :
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Viktor Gyuris , A. Prasad Sistla On-the-Fly Model Checking Under Fairness That Exploits Symmetry. [Citation Graph (0, 0)][DBLP ] CAV, 1997, pp:232-243 [Conf ] A. Prasad Sistla , L. Miliades , Viktor Gyuris SMC: A Symmetry Based Model Checker for Verification of Liveness Properties. [Citation Graph (0, 0)][DBLP ] CAV, 1997, pp:464-467 [Conf ] A. Prasad Sistla , Viktor Gyuris Parameterized Verification of Linear Networks using Automata as Invariants. [Citation Graph (0, 0)][DBLP ] Formal Asp. Comput., 1999, v:11, n:4, pp:402-425 [Journal ] Viktor Gyuris , A. Prasad Sistla On-the-Fly Model Checking Under Fairness that Exploits Symmetry. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 1999, v:15, n:3, pp:217-238 [Journal ] Ildikó Sain , Viktor Gyuris Finite Schematizable Algebraic Logic. [Citation Graph (0, 0)][DBLP ] Logic Journal of the IGPL, 1997, v:5, n:5, pp:- [Journal ] Viktor Gyuris A Short Proof of Representability of Fork Algebras. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1997, v:188, n:1-2, pp:211-220 [Journal ] A. Prasad Sistla , Viktor Gyuris , E. Allen Emerson SMC: a symmetry-based model checker for verification of safety and liveness properties. [Citation Graph (0, 0)][DBLP ] ACM Trans. Softw. Eng. Methodol., 2000, v:9, n:2, pp:133-166 [Journal ] Search in 0.003secs, Finished in 0.003secs