Search the dblp DataBase

Publications of Author

1. Henrik Hulgaard, Steven M. Burns
   Efficient Timing Analysis of a Class of Petri Nets. [Citation Graph (0, 0)][DBLP]
   CAV, 1995, pp:423-436 [Conf]
   
2. Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
   Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:486-491 [Conf]
   
3. Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken
   CAD Directions for High Performance Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:116-121 [Conf]
   
4. Scott Hauck, Gaetano Borriello, Steven M. Burns, Carl Ebeling
   MONTAGNE: An FPL for Synchronous and Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
   FPL, 1992, pp:44-51 [Conf]
   
5. Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens
   Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1999, pp:324-331 [Conf]
   
6. Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello
   Practical applications of an efficient time separation of events algorithm. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1993, pp:146-151 [Conf]
   
7. Tod Amon, Henrik Hulgaard, Steven M. Burns, Gaetano Borriello
   An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. [Citation Graph (0, 0)][DBLP]
   ICCD, 1993, pp:166-173 [Conf]
   
8. Scott Hauck, Steven M. Burns, Gaetano Borriello, Carl Ebeling
   An FPGA for Implementing Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1994, v:11, n:3, pp:60-69 [Journal]
   
9. Henrik Hulgaard, Steven M. Burns
   Bounded Delay Timing Analysis of a Class of CSP Programs. [Citation Graph (0, 0)][DBLP]
   Formal Methods in System Design, 1997, v:11, n:3, pp:265-294 [Journal]
   
10. Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello
    An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:11, pp:1306-1317 [Journal]
    
11. Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev
    Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:109-130 [Journal]
    
12. Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James Tschanz, Vivek De
    Comparative Analysis of Conventional and Statistical Design Techniques. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:238-243 [Conf]
    
13. Gaetano Borriello, Carl Ebeling, Scott Hauck, Steven M. Burns
    The Triptych FPGA architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:4, pp:491-501 [Journal]
    
14. Carl Ebeling, Larry McMurchie, Scott Hauck, Steven M. Burns
    Placement and routing tools for the Triptych FPGA. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:4, pp:473-482 [Journal]