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Hüsnü Yenigün:
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Publications of Author
- Robert P. Kurshan, Vladimir Levin, Hüsnü Yenigün
Compressing Transitions for Model Checking. [Citation Graph (0, 0)][DBLP] CAV, 2002, pp:569-581 [Conf]
- Vladimir Levin, Hüsnü Yenigün
SDLcheck: A Model Checking Tool. [Citation Graph (0, 0)][DBLP] CAV, 2001, pp:377- [Conf]
- Hüsnü Yenigün, Vladimir Levin, Doron Peled, Peter A. Beerel
Hazard-Freedom Checking in Speed-Independent Systems. [Citation Graph (0, 0)][DBLP] CHARME, 1999, pp:317-320 [Conf]
- Guy-Vincent Jourdan, Hasan Ural, Hüsnü Yenigün
Minimizing Coordination Channels in Distributed Testing. [Citation Graph (0, 0)][DBLP] FORTE, 2006, pp:451-466 [Conf]
- Hasan Ural, Hüsnü Yenigün
Towards Design Recovery from Observations. [Citation Graph (0, 0)][DBLP] FORTE, 2004, pp:133-149 [Conf]
- Hüsnü Yenigün, Esfandiar Haghverdi, S. Bilgen, K. Inan
A recursive process algebra for queues. [Citation Graph (0, 0)][DBLP] FORTE, 1993, pp:285-300 [Conf]
- Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron Peled, Hüsnü Yenigün
Verifying hardware in its software context. [Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:742-749 [Conf]
- Guy-Vincent Jourdan, Hasan Ural, Hüsnü Yenigün
Recovering the Lattice of Repetitive Sub-functions. [Citation Graph (0, 0)][DBLP] ISCIS, 2005, pp:956-965 [Conf]
- K. Tuncay Tekle, Hasan Ural, M. Cihan Yalcin, Hüsnü Yenigün
Generalizing Redundancy Elimination in Checking Sequences. [Citation Graph (0, 0)][DBLP] ISCIS, 2005, pp:915-926 [Conf]
- Jessica Chen, Robert M. Hierons, Hasan Ural, Hüsnü Yenigün
Eliminating Redundant Tests in a Checking Sequence. [Citation Graph (0, 0)][DBLP] TestCom, 2005, pp:146-158 [Conf]
- M. Cihan Yalcin, Hüsnü Yenigün
Using Distinguishing and UIO Sequences Together in a Checking Sequence. [Citation Graph (0, 0)][DBLP] TestCom, 2006, pp:259-273 [Conf]
- Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron Peled, Hüsnü Yenigün
Static Partial Order Reduction. [Citation Graph (0, 0)][DBLP] TACAS, 1998, pp:345-357 [Conf]
- Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron Peled, Hüsnü Yenigün
Combining Software and Hardware Verification Techniques. [Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 2002, v:21, n:3, pp:251-280 [Journal]
- Guy-Vincent Jourdan, Hasan Ural, Shen Wang, Hüsnü Yenigün
Recovering Repetitive Sub-functions from Observations. [Citation Graph (0, 0)][DBLP] FORTE, 2007, pp:35-49 [Conf]
Using a SAT solver to generate checking sequences. [Citation Graph (, )][DBLP]
Using adaptive distinguishing sequences in checking sequence constructions. [Citation Graph (, )][DBLP]
Checking Sequence Construction Using Adaptive and Preset Distinguishing Sequences. [Citation Graph (, )][DBLP]
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