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Laura K. Dillon: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ron Dolin, Divyakant Agrawal, Amr El Abbadi, Laura K. Dillon
    Pharos: A Scalable Distributed Architecture for Locating Heterogeneous Information Sources. [Citation Graph (2, 0)][DBLP]
    CIKM, 1997, pp:348-355 [Conf]
  2. G. Kutty, Y. S. Ramakrishna, Louise E. Moser, Laura K. Dillon, P. M. Melliar-Smith
    A Graphical Interval Logic Toolset for Verifying Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    CAV, 1993, pp:138-153 [Conf]
  3. Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna, G. Kutty, Laura K. Dillon
    The Real-Time Graphical Interval Logic Toolset. [Citation Graph (0, 0)][DBLP]
    CAV, 1996, pp:446-449 [Conf]
  4. Reimer Behrends, R. E. Kurt Stirewalt, Laura K. Dillon
    A Component-Oriented Model for the Design of Safe Multi-threaded Applications. [Citation Graph (0, 0)][DBLP]
    CBSE, 2005, pp:251-266 [Conf]
  5. Y. S. Ramakrishna, Laura K. Dillon, Louise E. Moser, P. M. Melliar-Smith, G. Kutty
    An Automata-Theoretic Decision Procedure for Future Interval Logic. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1992, pp:51-67 [Conf]
  6. Y. S. Ramakrishna, Laura K. Dillon, Louise E. Moser, P. M. Melliar-Smith, G. Kutty
    A Real-Time Interval Logic and Its Decision Procedure. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1993, pp:173-192 [Conf]
  7. George S. Avrunin, James C. Corbett, Laura K. Dillon
    Analyzing Partially-Implemented Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ICSE, 1997, pp:228-238 [Conf]
  8. Laura K. Dillon, G. Kutty, Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna
    Graphical Specifications for Concurrent Software Systems. [Citation Graph (0, 0)][DBLP]
    ICSE, 1992, pp:214-224 [Conf]
  9. Laura K. Dillon, Kurt Stirewalt
    Leightweight Analysis of Operational Specifications Using Inference Graphs. [Citation Graph (0, 0)][DBLP]
    ICSE, 2001, pp:57-67 [Conf]
  10. David S. Keyes, Laura K. Dillon, Moon-Jung Chung
    Analysis of a Scheduler for a CAD Framework. [Citation Graph (0, 0)][DBLP]
    ICSE, 1999, pp:152-161 [Conf]
  11. Kurt Stirewalt, Laura K. Dillon
    A Component-Based Approach to Building Formal Analysis Tools. [Citation Graph (0, 0)][DBLP]
    ICSE, 2001, pp:167-176 [Conf]
  12. G. Kutty, Louise E. Moser, P. M. Melliar-Smith, Laura K. Dillon, Y. S. Ramakrishna
    First-Order Future Interval Logic. [Citation Graph (0, 0)][DBLP]
    ICTL, 1994, pp:195-209 [Conf]
  13. P. M. Melliar-Smith, Louise E. Moser, Y. S. Ramakrishna, G. Kutty, Laura K. Dillon
    A System for Automated Deduction in Graphical Interval Logic. [Citation Graph (0, 0)][DBLP]
    ICTL, 1994, pp:540-542 [Conf]
  14. George S. Avrunin, Ugo A. Buy, James C. Corbett, Laura K. Dillon, Jack C. Wileden
    Experiments with an Improved Constrained Expression Toolset. [Citation Graph (0, 0)][DBLP]
    Symposium on Testing, Analysis, and Verification, 1991, pp:178-187 [Conf]
  15. George S. Avrunin, Jack C. Wileden, Laura K. Dillon
    Experiments in Automated Analysis of Concurrent Software Systems. [Citation Graph (0, 0)][DBLP]
    Symposium on Testing, Analysis, and Verification, 1989, pp:124-130 [Conf]
  16. Beata Sarna-Starosta, R. E. Kurt Stirewalt, Laura K. Dillon
    A Model-based Design-for-Verification Approach to Checking for Deadlock in Multi-threaded Applications. [Citation Graph (0, 0)][DBLP]
    SEKE, 2006, pp:120-125 [Conf]
  17. Laura K. Dillon, Y. S. Ramakrishna
    Generating Oracles from Your Favorite Temporal Logic Specifications. [Citation Graph (0, 0)][DBLP]
    SIGSOFT FSE, 1996, pp:106-117 [Conf]
  18. Laura K. Dillon, Qing Yu
    Oracles for Checking Temporal Properties of Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    SIGSOFT FSE, 1994, pp:140-153 [Conf]
  19. Kurt Stirewalt, Laura K. Dillon
    Generation of visitor components that implement program transformations. [Citation Graph (0, 0)][DBLP]
    SSR, 2001, pp:86-94 [Conf]
  20. G. Kutty, Laura K. Dillon, Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna
    Visual Tools for Temporal Reasoning. [Citation Graph (0, 0)][DBLP]
    VL, 1993, pp:152-159 [Conf]
  21. R. E. Kurt Stirewalt, Laura K. Dillon, Reimer Behrends
    Using Views to Specify a Synchronization Aspect for Object-Oriented Languages. [Citation Graph (0, 0)][DBLP]
    SEW, 2006, pp:272-281 [Conf]
  22. R. E. Kurt Stirewalt, Reimer Behrends, Laura K. Dillon
    Safe and Reliable Use of Concurrency in Multi-Threaded Shared-Memory Systems. [Citation Graph (0, 0)][DBLP]
    SEW, 2005, pp:201-210 [Conf]
  23. Philip K. McKinley, Kurt Stirewalt, Betty H. C. Cheng, Laura K. Dillon, Sandeep S. Kulkarni
    Education: Interactive Distributed Applications and the Computer Science Curriculum. [Citation Graph (0, 0)][DBLP]
    IEEE Distributed Systems Online, 2002, v:3, n:10, pp:- [Journal]
  24. G. Kutty, Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna, Laura K. Dillon
    Axiomatizations of Interval Logics. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 1995, v:24, n:4, pp:313-331 [Journal]
  25. Y. S. Ramakrishna, Louise E. Moser, Laura K. Dillon, P. M. Melliar-Smith, G. Kutty
    An automata-theoretic decision procedure for propositional temporal logic with since and until. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 1992, v:17, n:3, pp:271-282 [Journal]
  26. Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna, G. Kutty, Laura K. Dillon
    Automated Deduction in a Graphical Temporal Logic. [Citation Graph (0, 0)][DBLP]
    Journal of Applied Non-Classical Logics, 1996, v:6, n:1, pp:- [Journal]
  27. Laura K. Dillon
    An isolation approach to symbolic execution-based verification of Ada tasking programs. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 1991, v:14, n:3, pp:183-198 [Journal]
  28. Y. S. Ramakrishna, P. M. Melliar-Smith, Louise E. Moser, Laura K. Dillon, G. Kutty
    Interval Logics and Their Decision Procedures, Part I: An Interval Logic. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1996, v:166, n:1&2, pp:1-47 [Journal]
  29. Y. S. Ramakrishna, P. M. Melliar-Smith, Louise E. Moser, Laura K. Dillon, G. Kutty
    Interval Logics and Their Decision Procedures. Part II: A Real-Time Interval Logic. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1996, v:170, n:1-2, pp:1-46 [Journal]
  30. Laura K. Dillon
    Using Symbolic Execution for Verification of Ada Tasking Programs. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1990, v:12, n:4, pp:643-669 [Journal]
  31. Laura K. Dillon, George S. Avrunin, Jack C. Wileden
    Constrained Expressions: Toward Broad Applicability of Analysis Methods for Distributed Software Systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1988, v:10, n:3, pp:374-402 [Journal]
  32. Laura K. Dillon, G. Kutty, Louise E. Moser, P. M. Melliar-Smith, Y. S. Ramakrishna
    A Graphical Interval Logic for Specifying Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 1994, v:3, n:2, pp:131-165 [Journal]
  33. Louise E. Moser, Y. S. Ramakrishna, G. Kutty, P. M. Melliar-Smith, Laura K. Dillon
    A Graphical Environment for the Design of Concurrent Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 1997, v:6, n:1, pp:31-79 [Journal]
  34. Laura K. Dillon
    A Visual Model for Ada Tasking. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 1993, v:2, n:4, pp:311-345 [Journal]
  35. Laura K. Dillon
    Task Dependence and Termination in Ada. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 1997, v:6, n:1, pp:80-110 [Journal]
  36. George S. Avrunin, Ugo A. Buy, James C. Corbett, Laura K. Dillon, Jack C. Wileden
    Automated Analysis of Concurrent Systems With the Constrained Expression Toolset. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1991, v:17, n:11, pp:1204-1222 [Journal]
  37. George S. Avrunin, James C. Corbett, Laura K. Dillon
    Analyzing Partially-Implemented Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1998, v:24, n:8, pp:602-614 [Journal]
  38. George S. Avrunin, James C. Corbett, Laura K. Dillon, Jack C. Wileden
    Automated Derivation of Time Bounds in Uniprocessor Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1994, v:20, n:9, pp:708-719 [Journal]
  39. George S. Avrunin, Laura K. Dillon, Jack C. Wileden, William E. Riddle
    Constrained Expressions: Adding Analysis Capabilities to Design Methods for Concurrent Software Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1986, v:12, n:2, pp:278-292 [Journal]
  40. Laura K. Dillon
    Verifying General Safety Properties of Ada Tasking Programs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1990, v:16, n:1, pp:51-63 [Journal]
  41. Laura K. Dillon, Kurt Stirewalt
    Inference Graphs: A Computational Structure Supporting Generation of Customizable and Correct Analysis Components. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2003, v:29, n:2, pp:133-150 [Journal]
  42. Laura K. Dillon, Walter F. Tichy
    Guest Editors' Introduction: 2003 International Conference on Software Engineering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2004, v:30, n:6, pp:353-354 [Journal]
  43. Laura K. Dillon, G. Kutty, P. M. Melliar-Smith, Louise E. Moser, Y. S. Ramakrishna
    Visual Specifications for Temporal Reasoning. [Citation Graph (0, 0)][DBLP]
    J. Vis. Lang. Comput., 1994, v:5, n:1, pp:61-81 [Journal]

  44. A study of student strategies for the corrective maintenance of concurrent software. [Citation Graph (, )][DBLP]


  45. The inference validity problem in legal discovery. [Citation Graph (, )][DBLP]


  46. Refining Existing Theories of Program Comprehension During Maintenance for Concurrent Software. [Citation Graph (, )][DBLP]


  47. Prototyping synchronization policies for existing programs. [Citation Graph (, )][DBLP]


  48. Automated Test Input Generation for Software That Consumes ORM Models. [Citation Graph (, )][DBLP]


  49. Assessing the benefits of synchronization-adorned sequence diagrams: two controlled experiments. [Citation Graph (, )][DBLP]


  50. On Mechanisms for Deadlock Avoidance in SIP Servlet Containers. [Citation Graph (, )][DBLP]


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