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Robert B. Jones: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jens U. Skakkebæk, Robert B. Jones, David L. Dill
    Formal Verification of Out-of-Order Execution Using Incremental Flushing. [Citation Graph (0, 0)][DBLP]
    CAV, 1998, pp:98-109 [Conf]
  2. Mark Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones
    A Framework for Microprocessor Correctness Statements. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:433-448 [Conf]
  3. Mark Aagaard, Robert B. Jones, Roope Kaivola, Katherine R. Kohatsu, Carl-Johan H. Seger
    Formal verification of iterative algorithms in microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:201-206 [Conf]
  4. Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
    Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:538-541 [Conf]
  5. Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
    Parametric Representations of Boolean Constraints. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:402-407 [Conf]
  6. Robert B. Jones, Carl-Johan H. Seger, David L. Dill
    Self-Consistency Checking. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:159-171 [Conf]
  7. Robert B. Jones, Jens U. Skakkebæk, David L. Dill
    Reducing Manual Abstraction in Formal Verification of Out-of-Order Execution. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1998, pp:2-17 [Conf]
  8. Mark Aagaard, Nancy A. Day, Robert B. Jones
    Synchronization-at-Retirement for Pipeline Verification. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2004, pp:113-127 [Conf]
  9. Mark Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger
    A Methodology for Large-Scale Hardware Verification. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:263-282 [Conf]
  10. Thomas F. Melham, Robert B. Jones
    Abstraction by Symbolic Indexing Transformations. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:1-18 [Conf]
  11. Robert B. Jones, David L. Dill, Jerry R. Burch
    Efficient validity checking for processor verification. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:2-6 [Conf]
  12. Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
    Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving. [Citation Graph (0, 0)][DBLP]
    TPHOLs, 1999, pp:323-340 [Conf]
  13. Robert B. Jones, John W. O'Leary, Carl-Johan H. Seger, Mark Aagaard, Thomas F. Melham
    Practical Formal Verification in Microprocessor Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:4, pp:16-25 [Journal]
  14. Robert B. Jones, Jens U. Skakkebæk, David L. Dill
    Formal Verification of Out-of-Order Execution with Incremental Flushing. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2002, v:20, n:2, pp:139-158 [Journal]
  15. T. R. Girill, Thomas D. Griffin, Robert B. Jones
    Extended subject access to hypertext online documentation, Parts I and II: The search-support and maintenance problems. [Citation Graph (0, 0)][DBLP]
    JASIS, 1991, v:42, n:6, pp:414-426 [Journal]
  16. Mark Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones
    A framework for superscalar microprocessor correctness statements. [Citation Graph (0, 0)][DBLP]
    STTT, 2003, v:4, n:3, pp:298-312 [Journal]
  17. Carl-Johan H. Seger, Robert B. Jones, John W. O'Leary, Thomas F. Melham, Mark Aagaard, Clark Barrett, Don Syme
    An industrially effective environment for formal hardware verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:9, pp:1381-1405 [Journal]
  18. Sava Krstic, Robert B. Jones, John O'Leary
    Mothers of Pipelines. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:174, n:8, pp:7-22 [Journal]

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