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José M. Llabería: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Enric Morancho, José M. Llabería, Àngel Olivé
    Split Last-Address Predictor. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:230-0 [Conf]
  2. Enric Morancho, José M. Llabería, Àngel Olivé
    Looking at History to Filter Allocations in Prediction Tables. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:314-319 [Conf]
  3. Agustin Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García
    Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    EDMCC, 1991, pp:90-99 [Conf]
  4. Jordi Torres, Eduard Ayguadé, Jesús Labarta, José M. Llabería, Mateo Valero
    On Automatic Loop Data-Mapping for Distributed-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    EDMCC, 1991, pp:173-182 [Conf]
  5. A. M. del Corral, José M. Llabería
    Increasing the Effective Memory Bandwidth in Multivector Processors. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1996, pp:38-45 [Conf]
  6. A. de Dios, B. Sahelices, Pablo Ibáñez, Víctor Viñals, José M. Llabería
    Speeding-Up Synchronizations in DSM Multiprocessors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2006, pp:473-484 [Conf]
  7. Marta Jiménez, José M. Llabería, Agustin Fernández, Enric Morancho
    A Unified Transformation Technique for Multilevel Blocking. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. I, 1996, pp:402-405 [Conf]
  8. Enric Morancho, José M. Llabería, Àngel Olivé
    Two-Level Address Storage and Address Prediction (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2000, pp:960-964 [Conf]
  9. Marta Jiménez, José M. Llabería, Agustin Fernández
    On the Performance of Hand vs. Automatically Optimized Numerical Codes. [Citation Graph (0, 0)][DBLP]
    HPCA, 2000, pp:183-194 [Conf]
  10. Marta Jiménez, José M. Llabería, Agustin Fernández
    Performance Evaluation of Tiling for the Register Level. [Citation Graph (0, 0)][DBLP]
    HPCA, 1998, pp:254-265 [Conf]
  11. Juan J. Navarro, José M. Llabería, Mateo Valero
    Solving Matrix Problems with No Size Restriction on a Systolic Array Processor. [Citation Graph (0, 0)][DBLP]
    ICPP, 1986, pp:676-683 [Conf]
  12. A. M. del Corral, José M. Llabería
    Reducing Inter-Vector-Conflicts in Complex Memory Systems. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1996, pp:382-389 [Conf]
  13. Antonio González, José M. Llabería
    Instruction fetch unit for parallel execution of branch instructions. [Citation Graph (0, 0)][DBLP]
    ICS, 1989, pp:417-426 [Conf]
  14. Marta Jiménez, José M. Llabería, Agustin Fernández, Enric Morancho
    A General Algorithm for Tiling the Register Level. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:133-140 [Conf]
  15. A. M. del Corral, José M. Llabería
    Access order to avoid inter-vector-conflicts in complex memory systems. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:404-410 [Conf]
  16. José M. Llabería, Mateo Valero, Enrique Herrada Lillo, Jesús Labarta
    Analysis and Simulation of Multiplexed Single-Bus Networks With and Without Buffering. [Citation Graph (0, 0)][DBLP]
    ISCA, 1985, pp:414-421 [Conf]
  17. Juan J. Navarro, José M. Llabería, Mateo Valero
    Computing Size-Independent Matrix Problems on Systolic Array Processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1986, pp:271-278 [Conf]
  18. Miguel Valero-García, Juan J. Navarro, José M. Llabería, Mateo Valero
    Systematic Hardware Adaptation of Systolic Algorithms. [Citation Graph (0, 0)][DBLP]
    ISCA, 1989, pp:96-104 [Conf]
  19. Mateo Valero, Tomás Lang, José M. Llabería, Montse Peiron, Eduard Ayguadé, Juan J. Navarro
    Increasing the Number of Strides for Conflict-Free Vector Access. [Citation Graph (0, 0)][DBLP]
    ISCA, 1992, pp:372-381 [Conf]
  20. Jesús Labarta, Eduard Ayguadé, Jordi Torres, Mateo Valero, José M. Llabería
    Balanced Loop Partitioning Using GTS. [Citation Graph (0, 0)][DBLP]
    LCPC, 1991, pp:298-312 [Conf]
  21. A. M. del Corral, José M. Llabería
    New Access Order to Reduce Inter-Vector-Conflicts. [Citation Graph (0, 0)][DBLP]
    VECPAR, 1998, pp:425-438 [Conf]
  22. A. M. del Corral, José M. Llabería
    Minimizing Conflicts Between Vector Streams in Interleaved Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:4, pp:449-456 [Journal]
  23. Jordi Cortadella, José M. Llabería
    Evaluation of A + B = K Conditions Without Carry Propagation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:11, pp:1484-1488 [Journal]
  24. Antonio M. Gonzalez, José M. Llabería
    Reducing Branch Delay to Zero in Pipelined Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:3, pp:363-371 [Journal]
  25. Marta Jiménez, José M. Llabería, Agustin Fernández
    Register tiling in nonrectangular iteration spaces. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2002, v:24, n:4, pp:409-453 [Journal]
  26. Agustin Fernández, José M. Llabería, Miguel Valero-García
    Loop Transformation Using Nonunimodular Matrices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:8, pp:832-840 [Journal]
  27. Marta Jiménez, José M. Llabería, Agustin Fernández
    A Cost-Effective Implementation of Multilevel Tiling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2003, v:14, n:10, pp:1006-1020 [Journal]

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