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Feipei Lai :
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Edwin Naroska , Rung-Ji Shang , Feipei Lai , Uwe Schwiegelshohn Hybrid Parallel Circuit Simulation Approaches. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2000, pp:261-270 [Conf ] Shu-Lin Hwang , Feipei Lai Two Cache Lines Prediction for a Wide-Issue Micro-architecture. [Citation Graph (0, 0)][DBLP ] ACSAC, 2001, pp:71-79 [Conf ] Kun-Lin Tsai , Feipei Lai , Shanq-Jang Ruan , Szu-Wei Chaung State Reordering for Low Power Combinational Logic. [Citation Graph (0, 0)][DBLP ] Asia-Pacific Computer Systems Architecture Conference, 2003, pp:268-276 [Conf ] Jen-Chiun Lin , Chien-Hua Tzeng , Feipei Lai , Hung-Chang Lee Optimizing Centralized Secure Group Communications with Binary Key Tree Recomposition. [Citation Graph (0, 0)][DBLP ] AINA (1), 2004, pp:202-207 [Conf ] Yuh-Hua Hu , Lih-Chung Wang , Chun-yen Chou , Feipei Lai Similar Keys of Multivariate Quadratic Public Key Cryptosystems. [Citation Graph (0, 0)][DBLP ] CANS, 2005, pp:211-222 [Conf ] T. H. Yang , P. H. Cheng , C. H. Yang , F. Lai , C. L. Chen , H. H. Lee , K. P. Hsu , C. H. Chen , C. T. Tan , Y. S. Sun A Scalable Multi-tier Architecture for the National Taiwan University Hospital Information System based on HL7 Standard. [Citation Graph (0, 0)][DBLP ] CBMS, 2006, pp:99-104 [Conf ] Tzer-Shyong Chen , Feipei Lai , Rung-Ji Shang A Simple Tree Pattern Matching Algorithm for Code Generator. [Citation Graph (0, 0)][DBLP ] COMPSAC, 1995, pp:162-169 [Conf ] Lih-Chung Wang , Bo-Yin Yang , Yuh-Hua Hu , Feipei Lai A "Medium-Field" Multivariate Public-Key Encryption Scheme. [Citation Graph (0, 0)][DBLP ] CT-RSA, 2006, pp:132-149 [Conf ] Yen-Jen Chang , Chia-Lin Yang , Feipei Lai Value-Conscious Cache: Simple Technique for Reducing Cache Access Power. [Citation Graph (0, 0)][DBLP ] DATE, 2004, pp:16-21 [Conf ] Feipei Lai , Fong-chou Tsai A Pipeline Bubbles Reduction Technique for the Monsoon Dataflow Architecture. [Citation Graph (0, 0)][DBLP ] HICSS (1), 1994, pp:388-397 [Conf ] Kuang-Hung Pan , Hsiao-Kuang Wu , Rung-Ji Shang , Feipei Lai Performance Analysis of Broadcast in Synchronized Multihop Wireless Networks. [Citation Graph (0, 0)][DBLP ] HPCN Europe, 1999, pp:493-502 [Conf ] Shanq-Jang Ruan , Rung-Ji Shang , Feipei Lai , Shyh-Jong Chen , Xian-Jun Huang A bipartition-codec architecture to reduce power in pipelined circuits. [Citation Graph (0, 0)][DBLP ] ICCAD, 1999, pp:84-90 [Conf ] Yen-Jen Chang , Feipei Lai , Shanq-Jang Ruan Cache Design for Eliminating the Address Translation Bottleneck and Reducing the Tag Area Cost. [Citation Graph (0, 0)][DBLP ] ICCD, 2002, pp:334-339 [Conf ] Shanq-Jang Ruan , Edwin Naroska , Chia-Lin Ho , Feipei Lai Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. [Citation Graph (0, 0)][DBLP ] ICCD, 2002, pp:327-0 [Conf ] Feipei Lai , Yung-kuang Chao The Complementary Relationship of Interprocedural Register Allocation and Inlining. [Citation Graph (0, 0)][DBLP ] ICCL, 1994, pp:253-264 [Conf ] Feipei Lai , Lea-Ming Tzeng , Thom-Ling Chang , Tai-Ming Parng MARS Performance Evaluation with Different Interconnection Networks. [Citation Graph (0, 0)][DBLP ] ICSI, 1990, pp:248-257 [Conf ] Edwin Naroska , Shanq-Jang Ruan , Feipei Lai , Uwe Schwiegelshohn , Le-Chin Liu On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:277-280 [Conf ] Kun-Lin Tsai , Szu-Wei Chaung , Feipei Lai , Shanq-Jang Ruan A low power scheduling method using dual V/sub dd/ and dual V/sub th/. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2005, pp:684-687 [Conf ] Shanq-Jang Ruan , Jen-Chiun Lin , Po-Hung Chen , Kun-Lin Tsai , Feipei Lai Synthesis of partition-codec architecture for low power and small area circuit design. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2001, pp:523-526 [Conf ] Po-Hung Chen , Shanq-Jang Ruan , Kuen-Pin Wu , Dai-Xun Hu , Feipei Lai , Kun-Lin Tsai An entropy-based algorithm to reduce area overhead for bipartition-codec architecture. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2001, pp:49-52 [Conf ] Yen-Jen Chang , Chia-Lin Yang , Feipei Lai A power-aware SWDR cell for reducing cache write power. [Citation Graph (0, 0)][DBLP ] ISLPED, 2003, pp:14-17 [Conf ] Wen-Yew Liang , Chun-Ta King , Feipei Lai Adsmith: An Efficient Object-Based Distributed Shared Memory System On Pvm. [Citation Graph (0, 0)][DBLP ] ISPAN, 1996, pp:173-179 [Conf ] Yuh-Hua Hu , Chun-yen Chou , Lih-Chung Wang , Feipei Lai Cryptanalysis of Variants of UOV. [Citation Graph (0, 0)][DBLP ] ISC, 2006, pp:161-170 [Conf ] Yen-Jen Chang , Feipei Lai , Shanq-Jang Ruan An Efficient Two-Level Filter Scheme for Low Power Cache. [Citation Graph (0, 0)][DBLP ] IWLS, 2002, pp:61-66 [Conf ] Yu-Fang Chung , Zhen Yu Wu , Feipei Lai , Tzer-Shyong Chen Anonymous Signcryption in Ring Signature Scheme over Elliptic Curve Cryptosystem. [Citation Graph (0, 0)][DBLP ] JCIS, 2006, pp:- [Conf ] Yu-Fang Chung , Zhen Yu Wu , Feipei Lai , Tzer-Shyong Chen Unconditionally Secure Cryptosystem Based on Quantum Cryptography. [Citation Graph (0, 0)][DBLP ] JCIS, 2006, pp:- [Conf ] Jen-Chiun Lin , Chun-yen Chou , Feipei Lai , Kuen-Pin Wu A Distributed Key Management Protocol for Dynamic Groups. [Citation Graph (0, 0)][DBLP ] LCN, 2002, pp:113-122 [Conf ] Jen-Chiun Lin , Feipei Lai , Hung-Chang Lee Efficient Group Key Management Protocol with One-Way Key Derivation. [Citation Graph (0, 0)][DBLP ] LCN, 2005, pp:336-343 [Conf ] Kuen-Pin Wu , Shanq-Jang Ruan , Feipei Lai , Chih-Kuang Tseng On Key Distribution in Secure Multicasting. [Citation Graph (0, 0)][DBLP ] LCN, 2000, pp:208-212 [Conf ] Chih-Kuang Tseng , Kuen-Pin Wu , Jen-Chiun Lin , Chun-yen Chou , Feipei Lai A Constant Size Rekeying Message Framework for Secure Multicasting. [Citation Graph (0, 0)][DBLP ] LCN, 2001, pp:380-385 [Conf ] Meng-chou Chang , Feipei Lai , Rung-Ji Shang Exploiting instruction-level parallelism with the conjugate register file scheme. [Citation Graph (0, 0)][DBLP ] MICRO, 1992, pp:29-32 [Conf ] Feipei Lai , Hung-Chang Lee , Chun-Luh Lee Optimization on instruction reorganization. [Citation Graph (0, 0)][DBLP ] MICRO, 1990, pp:143-148 [Conf ] Feipei Lai , Chyuan-Yow Wu , Tai-Ming Parng A memory management unit and cache controller for the MARS system. [Citation Graph (0, 0)][DBLP ] MICRO, 1990, pp:200-208 [Conf ] Kuo-Chang Ting , Mao-yu Jan , Sung-huai Hsieh , Hsiu-Hui Lee , Feipei Lai Design and analysis of grouping-based DCF (GB-DCF) scheme for the MAC layer enhancement of 802.11 and 802.11n. [Citation Graph (0, 0)][DBLP ] MSWiM, 2006, pp:255-264 [Conf ] Jeng-Wei Lin , Ray-I Chang , Jan-Ming Ho , Feipei Lai Aggressive Traffic Smoothing for Delivery of Online Multimedia. [Citation Graph (0, 0)][DBLP ] PCM (1), 2004, pp:114-121 [Conf ] Yu-Fang Chung , Chia-Hui Liu , Feipei Lai , Tzer-Shyong Chen Threshold Signature Scheme Resistible for Conspiracy Attack. [Citation Graph (0, 0)][DBLP ] PDCAT, 2006, pp:479-483 [Conf ] Lih-Chung Wang , Yuh-Hua Hu , Feipei Lai , Chun-yen Chou , Bo-Yin Yang Tractable Rational Map Signature. [Citation Graph (0, 0)][DBLP ] Public Key Cryptography, 2005, pp:244-257 [Conf ] Yen-Jen Chang , Yung-Ching Weng , Feipei Lai Enhanced object management for high performance web proxies. [Citation Graph (0, 0)][DBLP ] SAC, 2004, pp:1711-1716 [Conf ] Jeng-Wei Lin , Li-Ming Tseng , Jan-Ming Ho , Feipei Lai A Web Redirection Service for Variant Chinese Domain Name Resolution. [Citation Graph (0, 0)][DBLP ] ICITA (1), 2005, pp:543-548 [Conf ] Kuang-Hung Pan , Hsiao-Kuang Wu , Rung-Ji Shang , Feipei Lai Performance analysis of broadcast in mobile ad hoc networks with synchronized and non-synchronized reception. [Citation Graph (0, 0)][DBLP ] Computer Communications, 2000, v:23, n:5-6, pp:511-524 [Journal ] Feipei Lai , Chia-Cheng Yeh , Hung-Chang Lee Register Allocation Via Dynamically Updated Information. [Citation Graph (0, 0)][DBLP ] J. Inf. Sci. Eng., 1992, v:8, n:3, pp:393-413 [Journal ] Yen-Jen Chang , Feipei Lai Dynamic Zero-Sensitivity Scheme for Low-Power Cache Memories. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:4, pp:20-32 [Journal ] Jyh-Yuan Deng , Feipei Lai Region-based template deformation and masking for eye-feature extraction and description. [Citation Graph (0, 0)][DBLP ] Pattern Recognition, 1997, v:30, n:3, pp:403-419 [Journal ] Meng-chou Chang , Feipei Lai Efficient Exploitation of Instruction-Level Parallelism for Superscalar Processors by the Conjugate Register File Scheme. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:3, pp:278-293 [Journal ] Shanq-Jang Ruan , Rung-Ji Shang , Feipei Lai , Kun-Lin Tsai A bipartition-codec architecture to reduce power in pipelinedcircuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:2, pp:343-348 [Journal ] Shanq-Jang Ruan , Kun-Lin Tsai , Edwin Naroska , Feipei Lai Bipartitioning and encoding in low-power pipelined circuits. [Citation Graph (0, 0)][DBLP ] ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:1, pp:24-32 [Journal ] Meng-chou Chang , Feipei Lai , Wei-Chao Chen Image Shading Taking into Account Relativistic Effects. [Citation Graph (0, 0)][DBLP ] ACM Trans. Graph., 1996, v:15, n:4, pp:265-300 [Journal ] Jeng-Wei Lin , Jan-Ming Ho , Li-Ming Tseng , Feipei Lai IDN server proxy architecture for Internationalized Domain Name resolution and experiences with providing Web services. [Citation Graph (0, 0)][DBLP ] ACM Trans. Internet Techn., 2006, v:6, n:1, pp:1-19 [Journal ] Victor R. L. Shen , Feipei Lai Requirements specification and analysis of digital systems using fuzzy and marked Petri nets. [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Systems, Man, and Cybernetics, Part B, 1998, v:28, n:5, pp:748-754 [Journal ] Yen-Jen Chang , Feipei Lai , Chia-Lin Yang Zero-aware asymmetric SRAM cell for reducing cache power in writing zero. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2004, v:12, n:8, pp:827-836 [Journal ] Po-Hung Chen , Hung-Ming Chen , Kuo-Jui Hung , Wen-Hsien Fang , Mon-Chau Shie , Feipei Lai Markov model fuzzy-reasoning based algorithm for fast block motion estimation. [Citation Graph (0, 0)][DBLP ] J. Visual Communication and Image Representation, 2006, v:17, n:1, pp:131-142 [Journal ] Yu-Fang Chung , Zhen Yu Wu , Feipei Lai , Tzer-Shyong Chen A Novel ID-Based Threshold Ring Signature Scheme Competent for Anonymity and Anti-forgery. [Citation Graph (0, 0)][DBLP ] CIS, 2006, pp:502-512 [Conf ] Kun-Lin Tsai , Ju-Yueh Lee , Shanq-Jang Ruan , Feipei Lai Low power scheduling method using multiple supply voltages. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Kuo-Chang Ting , Mao-yu Jan , Sung-huai Hsieh , Hsiu-Hui Lee , Feipei Lai GDCF: Grouping DCF for the MAC layer enhancement of 802.11. [Citation Graph (0, 0)][DBLP ] GLOBECOM, 2006, pp:- [Conf ] Shanq-Jang Ruan , Edwin Naroska , Yen-Jen Chang , Feipei Lai , Uwe Schwiegelshohn ENPCO: an entropy-based partition-codec algorithm to reduce power for bipartition-codec architecture in pipelined circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:942-949 [Journal ] Yen-Jen Chang , Shanq-Jang Ruan , Feipei Lai Design and analysis of low-power cache using two-level filter scheme. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2003, v:11, n:4, pp:568-580 [Journal ] Middleware based Inpatient Healthcare Information System. [Citation Graph (, )][DBLP ] Web Services Based Bio-signal System Leveraging Support Vector Machines. [Citation Graph (, )][DBLP ] Newborn Screening System Based on Adaptive Feature Selection and Support Vector Machines. [Citation Graph (, )][DBLP ] Real-time Automated MDRO Surveillance System. [Citation Graph (, )][DBLP ] Using Ensemble Classifier Learning for Cancer Classification. [Citation Graph (, )][DBLP ] Design and Enhance a Dynamic Healthcare Portal Site. [Citation Graph (, )][DBLP ] A Newborn Screening System Based on Service-Oriented Architecture Embedded Support Vector Machine. [Citation Graph (, )][DBLP ] Paged cache: an efficient partition architecture for reducing power, area and access time. [Citation Graph (, )][DBLP ] Energy analysis of bipartition architecture for pipelined circuits. [Citation Graph (, )][DBLP ] Intelligent stock trading system with price trend prediction and reversal recognition using dual-module neural networks. [Citation Graph (, )][DBLP ] Search in 0.062secs, Finished in 0.065secs