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Emre Özer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Emre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte
    A Fast Interrupt Handling Scheme for VLIW Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:136-141 [Conf]
  2. Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee
    Efficient System-on-Chip Energy Management with a Segmented Bloom Filter. [Citation Graph (0, 0)][DBLP]
    ARCS, 2006, pp:283-297 [Conf]
  3. Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee
    Reducing energy of virtual cache synonym lookup using bloom filters. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:179-189 [Conf]
  4. Emre Özer, Andy Nisbet, David Gregg
    Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors. [Citation Graph (0, 0)][DBLP]
    CC, 2004, pp:250-264 [Conf]
  5. Emre Özer, Andy Nisbet, David Gregg
    Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:318-327 [Conf]
  6. Emre Özer, Andy Nisbet, David Gregg
    Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:273-274 [Conf]
  7. Emre Özer, Thomas M. Conte, Saurabh Sharma
    Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors. [Citation Graph (0, 0)][DBLP]
    HiPC, 2001, pp:192-203 [Conf]
  8. Owen Callanan, Andy Nisbet, Emre Özer, James Sexton, David Gregg
    FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  9. Yunhe Shi, Emre Özer, David Gregg
    Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors. [Citation Graph (0, 0)][DBLP]
    ISCIS, 2006, pp:248-257 [Conf]
  10. Emre Özer, Resit Sendag, David Gregg
    Multiple-Valued Caches for Power-Efficient Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2005, pp:126-131 [Conf]
  11. Emre Özer, Sanjeev Banerjia, Thomas M. Conte
    Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:308-315 [Conf]
  12. Emre Özer, Thomas M. Conte
    High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:12, pp:1132-1142 [Journal]
  13. Emre Özer, Stuart Biles
    Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2007, pp:376-386 [Conf]

  14. Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. [Citation Graph (, )][DBLP]

  15. Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. [Citation Graph (, )][DBLP]

  16. Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor. [Citation Graph (, )][DBLP]

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