The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Mithuna Thottethodi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi
    Architectural support for operating system-driven CMP cache management. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:2-12 [Conf]
  2. Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, Mithuna Thottethodi
    Annotated Memory References: A Mechanism for Informed Cache Management. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:1251-1254 [Conf]
  3. Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
    Self-Tuned Congestion Control for Multiprocessor Networks. [Citation Graph (0, 0)][DBLP]
    HPCA, 2001, pp:107-0 [Conf]
  4. Siddhartha Chatterjee, Vibhor V. Jain, Alvin R. Lebeck, Shyam Mundhra, Mithuna Thottethodi
    Nonlinear array layouts for hierarchical memory systems. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:444-453 [Conf]
  5. Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
    BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:45- [Conf]
  6. Daeho Seo, Akif Ali, Won-Taek Lim, Nauman Rafique, Mithuna Thottethodi
    Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:432-443 [Conf]
  7. Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K. Patnala, Mithuna Thottethodi
    Recursive Array Layouts and Fast Parallel Matrix Multiplication. [Citation Graph (0, 0)][DBLP]
    SPAA, 1999, pp:222-231 [Conf]
  8. Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K. Patnala, Mithuna Thottethodi
    Recursive Array Layouts and Fast Matrix Multiplication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:11, pp:1105-1123 [Journal]
  9. Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
    Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for k-Ary n-Cube Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:3, pp:257-272 [Journal]
  10. Daeho Seo, Mithuna Thottethodi
    Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-10 [Conf]
  11. Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson
    Aquacore: a programmable architecture for microfluidics. [Citation Graph (0, 0)][DBLP]
    ISCA, 2007, pp:254-265 [Conf]

  12. Effective Management of DRAM Bandwidth in Multicore Processors. [Citation Graph (, )][DBLP]


  13. Evaluating ISA Support and Hardware Support for Recursive Data Layouts. [Citation Graph (, )][DBLP]


  14. Disjoint-path routing: Efficient communication for streaming applications. [Citation Graph (, )][DBLP]


  15. SieveStore: a highly-selective, ensemble-level disk cache for cost-performance. [Citation Graph (, )][DBLP]


  16. Power-efficient clustering via incomplete bypassing. [Citation Graph (, )][DBLP]


  17. Automatic volume management for programmable microfluidics. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002