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Ayose Falcón: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero
    Branch predictor guided instruction decoding. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:202-211 [Conf]
  2. Ayose Falcón, Alex Ramírez, Mateo Valero
    A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:244-253 [Conf]
  3. Carmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero
    A Complexity-Effective Simultaneous Multithreading Architecture. [Citation Graph (0, 0)][DBLP]
    ICPP, 2005, pp:157-164 [Conf]
  4. Ayose Falcón, Alex Ramírez, Mateo Valero
    Effective Instruction Prefetching via Fetch Prestaging. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  5. Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero
    Prophet/Critic Hybrid Branch Prediction. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:250-263 [Conf]
  6. Ayose Falcón, Oliverio J. Santana, Pedro Medina, Enrique Fernández, Alex Ramírez, Mateo Valero
    Studying New Ways for Improving Adaptive History Length Branch Predictors. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2002, pp:271-280 [Conf]
  7. Ayose Falcón, Oliverio J. Santana, Alex Ramírez, Mateo Valero
    Tolerating Branch Predictor Latency on SMT. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2003, pp:86-98 [Conf]
  8. Oliverio J. Santana, Ayose Falcón, Enrique Fernández, Pedro Medina, Alex Ramírez, Mateo Valero
    A Comprehensive Analysis of Indirect Branch Prediction. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2002, pp:133-145 [Conf]
  9. Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero
    Better Branch Prediction Through Prophet/Critic Hybrids. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2005, v:25, n:1, pp:80-89 [Journal]

  10. An Adaptive Synchronization Technique for Parallel Simulation of Networked Clusters. [Citation Graph (, )][DBLP]


  11. Combining Simulation and Virtualization through Dynamic Sampling. [Citation Graph (, )][DBLP]


  12. High-speed network modeling for full system simulation. [Citation Graph (, )][DBLP]


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