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Kevin Skadron :
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Kevin Skadron , Margaret Martonosi , Douglas W. Clark A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2000, pp:199-206 [Conf ] Sung Woo Chung , Kevin Skadron Using Branch Prediction Information for Near-Optimal I-Cache Leakage. [Citation Graph (0, 0)][DBLP ] Asia-Pacific Computer Systems Architecture Conference, 2006, pp:24-37 [Conf ] Zhijian Lu , Jason Hein , Marty Humphrey , Mircea R. Stan , John Lach , Kevin Skadron Control-theoretic dynamic frequency and voltage scaling for multimedia workloads. [Citation Graph (0, 0)][DBLP ] CASES, 2002, pp:156-163 [Conf ] Wei Huang , Mircea R. Stan , Kevin Skadron , Karthik Sankaranarayanan , Shougata Ghosh , Sivakumar Velusamy Compact thermal modeling for temperature-aware design. [Citation Graph (0, 0)][DBLP ] DAC, 2004, pp:878-883 [Conf ] Yan Zhang , Zhijian Lu , John Lach , Kevin Skadron , Mircea R. Stan Optimal procrastinating voltage scheduling for hard real-time systems. [Citation Graph (0, 0)][DBLP ] DAC, 2005, pp:905-908 [Conf ] Yingmin Li , Dharmesh Parikh , Yan Zhang , Karthik Sankaranarayanan , Mircea R. Stan , Kevin Skadron State-Preserving vs. Non-State-Preserving Leakage Control in Caches. [Citation Graph (0, 0)][DBLP ] DATE, 2004, pp:22-29 [Conf ] Zhijian Lu , Yan Zhang , Mircea R. Stan , John Lach , Kevin Skadron Procrastinating voltage scheduling with discrete frequency sets. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:456-461 [Conf ] Kevin Skadron Hybrid Architectural Dynamic Thermal Management. [Citation Graph (0, 0)][DBLP ] DATE, 2004, pp:10-15 [Conf ] Theo Ungerer , Josep-Lluis Larriba-Pey , Kevin Skadron , Pedro Trancoso Topic 7 - Parallel Computer Architecture and ILP. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2005, pp:485-485 [Conf ] Dharmesh Parikh , Kevin Skadron , Yan Zhang , Marco Barcella , Mircea R. Stan Power Issues Related to Branch Prediction. [Citation Graph (0, 0)][DBLP ] HPCA, 2002, pp:233-0 [Conf ] Yingmin Li , David Brooks , Zhigang Hu , Kevin Skadron Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. [Citation Graph (0, 0)][DBLP ] HPCA, 2005, pp:71-82 [Conf ] Kevin Skadron , Tarek F. Abdelzaher , Mircea R. Stan Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. [Citation Graph (0, 0)][DBLP ] HPCA, 2002, pp:17-28 [Conf ] Kevin Skadron , Douglas W. Clark Design Issues and Tradeoffs for Write Buffers. [Citation Graph (0, 0)][DBLP ] HPCA, 1997, pp:144-155 [Conf ] Zhijian Lu , Wei Huang , John Lach , Mircea R. Stan , Kevin Skadron Interconnect lifetime prediction under dynamic stress for reliability-aware design. [Citation Graph (0, 0)][DBLP ] ICCAD, 2004, pp:327-334 [Conf ] John W. Haskins Jr. , Kevin Skadron Minimal Subset Evaluation: Rapid Warm-Up for Simulated Hardware State. [Citation Graph (0, 0)][DBLP ] ICCD, 2001, pp:32-39 [Conf ] Zhigang Hu , Philo Juang , Kevin Skadron , Douglas W. Clark , Margaret Martonosi Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. [Citation Graph (0, 0)][DBLP ] ICCD, 2002, pp:442-445 [Conf ] John Lach , Jason Brandon , Kevin Skadron A General Post-Processing Approach to Leakage Current Reduction in SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP ] ICCD, 2004, pp:144-150 [Conf ] Kyeong-Jae Lee , Kevin Skadron , Wei Huang Analytical Model for Sensor Placement on Microprocessors. [Citation Graph (0, 0)][DBLP ] ICCD, 2005, pp:24-30 [Conf ] Zhijian Lu , John Lach , Mircea R. Stan , Kevin Skadron Reducing Multimedia Decode Power using Feedback Control. [Citation Graph (0, 0)][DBLP ] ICCD, 2003, pp:489-0 [Conf ] Sivakumar Velusamy , Wei Huang , John Lach , Mircea R. Stan , Kevin Skadron Monitoring Temperature in FPGA based SoCs. [Citation Graph (0, 0)][DBLP ] ICCD, 2005, pp:634-640 [Conf ] Pritpal S. Ahuja , Kevin Skadron , Margaret Martonosi , Douglas W. Clark Multipath Execution: Opportunities and Limits. [Citation Graph (0, 0)][DBLP ] International Conference on Supercomputing, 1998, pp:101-108 [Conf ] Kyeong-Jae Lee , Kevin Skadron Using Performance Counters for Runtime Temperature Sensing in High-Performance Processors. [Citation Graph (0, 0)][DBLP ] IPDPS, 2005, pp:- [Conf ] Kevin Skadron , Mircea R. Stan , Wei Huang , Sivakumar Velusamy , Karthik Sankaranarayanan , David Tarjan Temperature-Aware Microarchitecture. [Citation Graph (0, 0)][DBLP ] ISCA, 2003, pp:2-13 [Conf ] Zhigang Hu , Philo Juang , Phil Diodato , Stefanos Kaxiras , Kevin Skadron , Margaret Martonosi , Douglas W. Clark Managing leakage for transient data: decay and quasi-static 4T memory cells. [Citation Graph (0, 0)][DBLP ] ISLPED, 2002, pp:52-55 [Conf ] Wei Huang , Eric Humenay , Kevin Skadron , Mircea R. Stan The need for a full-chip and package thermal model for thermally optimized IC designs. [Citation Graph (0, 0)][DBLP ] ISLPED, 2005, pp:245-250 [Conf ] Yingmin Li , David Brooks , Zhigang Hu , Kevin Skadron , Pradip Bose Understanding the energy efficiency of simultaneous multithreading. [Citation Graph (0, 0)][DBLP ] ISLPED, 2004, pp:44-49 [Conf ] Yingmin Li , Mark Hempstead , Patrick Mauro , David Brooks , Zhigang Hu , Kevin Skadron Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices. [Citation Graph (0, 0)][DBLP ] ISLPED, 2005, pp:173-178 [Conf ] Yan Zhang , John Lach , Kevin Skadron , Mircea R. Stan Odd/even bus invert with two-phase transfer for buses with coupling. [Citation Graph (0, 0)][DBLP ] ISLPED, 2002, pp:80-83 [Conf ] Sung Woo Chung , Kevin Skadron A Novel Software Solution for Localized Thermal Problems. [Citation Graph (0, 0)][DBLP ] ISPA, 2006, pp:63-74 [Conf ] John W. Haskins Jr. , Kevin Skadron Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation. [Citation Graph (0, 0)][DBLP ] ISPASS, 2003, pp:195-203 [Conf ] Kevin Skadron , Pritpal S. Ahuja , Margaret Martonosi , Douglas W. Clark Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. [Citation Graph (0, 0)][DBLP ] MICRO, 1998, pp:259-271 [Conf ] Vivek Sharma , Arun Thomas , Tarek F. Abdelzaher , Kevin Skadron , Zhijian Lu Power-aware QoS Management in Web Servers. [Citation Graph (0, 0)][DBLP ] RTSS, 2003, pp:63-0 [Conf ] Kevin Skadron A microprocessor survey course for learning advanced computer architecture. [Citation Graph (0, 0)][DBLP ] SIGCSE, 2002, pp:152-156 [Conf ] Philo Juang , Phil Diodato , Stefanos Kaxiras , Kevin Skadron , Zhigang Hu , Margaret Martonosi , Douglas W. Clark Implementing Decay Techniques using 4T Quasi-Static Memory Cells. [Citation Graph (0, 0)][DBLP ] Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal ] Kevin Skadron , Margaret Martonosi , David I. August , Mark D. Hill , David J. Lilja , Vijay S. Pai Challenges in Computer Architecture Evaluation. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2003, v:36, n:8, pp:30-36 [Journal ] Mircea R. Stan , Kevin Skadron Guest Editors' Introduction: Power-Aware Computing. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2003, v:36, n:12, pp:35-38 [Journal ] Zhijian Lu , John Lach , Mircea R. Stan , Kevin Skadron Alloyed Branch History: Combining Global and Local Branch History for Robust Performance. [Citation Graph (0, 0)][DBLP ] International Journal of Parallel Programming, 2003, v:31, n:2, pp:137-177 [Journal ] Kevin Skadron , Margaret Martonosi , Douglas W. Clark Speculative Updates of Local and Global Branch History: A Quantitative Analysis. [Citation Graph (0, 0)][DBLP ] J. Instruction-Level Parallelism, 2000, v:2, n:, pp:- [Journal ] Zhijian Lu , John Lach , Mircea R. Stan , Kevin Skadron Improved Thermal Management with Reliability Banking. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:40-49 [Journal ] Kevin Skadron , Mircea R. Stan , Wei Huang , Sivakumar Velusamy , Karthik Sankaranarayanan , David Tarjan Temperature-Aware Computer Systems: Opportunities and Challenges. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2003, v:23, n:6, pp:52-61 [Journal ] John W. Haskins Jr. , Kevin Skadron Accelerated warmup for sampled microarchitecture simulation. [Citation Graph (0, 0)][DBLP ] TACO, 2005, v:2, n:1, pp:78-108 [Journal ] Philo Juang , Kevin Skadron , Margaret Martonosi , Zhigang Hu , Douglas W. Clark , Phil Diodato , Stefanos Kaxiras Implementing branch-predictor decay using quasi-static memory cells. [Citation Graph (0, 0)][DBLP ] TACO, 2004, v:1, n:2, pp:180-219 [Journal ] Karthik Sankaranarayanan , Kevin Skadron Profile-based adaptation for cache decay. [Citation Graph (0, 0)][DBLP ] TACO, 2004, v:1, n:3, pp:305-322 [Journal ] Kevin Skadron , Mircea R. Stan , Karthik Sankaranarayanan , Wei Huang , Sivakumar Velusamy , David Tarjan Temperature-aware microarchitecture: Modeling and implementation. [Citation Graph (0, 0)][DBLP ] TACO, 2004, v:1, n:1, pp:94-125 [Journal ] David Tarjan , Kevin Skadron Merging path and gshare indexing in perceptron branch prediction. [Citation Graph (0, 0)][DBLP ] TACO, 2005, v:2, n:3, pp:280-300 [Journal ] Michele Co , Dee A. B. Weikle , Kevin Skadron Evaluating trace cache energy efficiency. [Citation Graph (0, 0)][DBLP ] TACO, 2006, v:3, n:4, pp:450-476 [Journal ] Dharmesh Parikh , Kevin Skadron , Yan Zhang , Mircea R. Stan Power-Aware Branch Prediction: Characterization and Design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2004, v:53, n:2, pp:168-186 [Journal ] Kevin Skadron , Pritpal A. Ahuja , Margaret Martonosi , Douglas W. Clark Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:11, pp:1260-1281 [Journal ] Tibor Horvath , Tarek F. Abdelzaher , Kevin Skadron , Xue Liu Dynamic Voltage Scaling in Multitier Web Servers with End-to-End Delay Control. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2007, v:56, n:4, pp:444-458 [Journal ] Wei Huang , Shougata Ghosh , Sivakumar Velusamy , Karthik Sankaranarayanan , Kevin Skadron , Mircea R. Stan HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2006, v:14, n:5, pp:501-513 [Journal ] Eric Humenay , David Tarjan , Kevin Skadron Impact of process variations on multicore performance symmetry. [Citation Graph (0, 0)][DBLP ] DATE, 2007, pp:1653-1658 [Conf ] Jeremy W. Sheaffer , David P. Luebke , Kevin Skadron A flexible simulation framework for graphics architectures. [Citation Graph (0, 0)][DBLP ] Graphics Hardware, 2004, pp:85-94 [Conf ] Jeremy W. Sheaffer , David P. Luebke , Kevin Skadron A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors. [Citation Graph (0, 0)][DBLP ] Graphics Hardware, 2007, pp:55-64 [Conf ] Tibor Horvath , Kevin Skadron , Tarek F. Abdelzaher Enhancing Energy Efficiency in Multi-tier Web Server Clusters via Prioritization. [Citation Graph (0, 0)][DBLP ] IPDPS, 2007, pp:1-6 [Conf ] Kevin Dale , Jeremy W. Sheaffer , Vinu Vijay Kumar , David P. Luebke , Greg Humphreys , Kevin Skadron Applications of Small-Scale Reconfigurability to Graphics Processors. [Citation Graph (0, 0)][DBLP ] ARC, 2006, pp:99-108 [Conf ] Zhijian Lu , Wei Huang , Mircea R. Stan , Kevin Skadron , John Lach Interconnect Lifetime Prediction for Reliability-Aware Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2007, v:15, n:2, pp:159-172 [Journal ] Mircea R. Stan , Kevin Skadron , Marco Barcella , Wei Huang , Karthik Sankaranarayanan , Sivakumar Velusamy HotSpot: a dynamic compact thermal model at the processor-architecture level. [Citation Graph (0, 0)][DBLP ] Microelectronics Journal, 2003, v:34, n:12, pp:1153-1165 [Journal ] Multi-mode energy management for multi-tier server clusters. [Citation Graph (, )][DBLP ] Accelerating SQL database operations on a GPU with CUDA. [Citation Graph (, )][DBLP ] Federation: repurposing scalar cores for out-of-order instruction issue. [Citation Graph (, )][DBLP ] Many-core design from a thermal perspective. [Citation Graph (, )][DBLP ] Predictive design space exploration using genetically programmed response surfaces. [Citation Graph (, )][DBLP ] CMP design space exploration subject to physical constraints. [Citation Graph (, )][DBLP ] Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs. [Citation Graph (, )][DBLP ] Accelerating leukocyte tracking using CUDA: A case study in leveraging manycore coprocessors. [Citation Graph (, )][DBLP ] Dynamic warp subdivision for integrated branch and memory divergence tolerance. [Citation Graph (, )][DBLP ] Studying Thermal Management for Graphics-Processor Architectures. [Citation Graph (, )][DBLP ] Differentiating the roles of IR measurement and simulation for power and temperature-aware design. [Citation Graph (, )][DBLP ] Increasing memory miss tolerance for SIMD cores. [Citation Graph (, )][DBLP ] Rodinia: A benchmark suite for heterogeneous computing. [Citation Graph (, )][DBLP ] Accelerating Compute-Intensive Applications with GPUs and FPGAs. [Citation Graph (, )][DBLP ] Foreword. [Citation Graph (, )][DBLP ] Search in 0.004secs, Finished in 0.305secs