The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Douglas W. Clark: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Douglas W. Clark, C. Cordell Green
    An Empirical Study of List Structure in Lisp. [Citation Graph (1, 0)][DBLP]
    Commun. ACM, 1977, v:20, n:2, pp:78-87 [Journal]
  2. Douglas W. Clark, Joel S. Emer
    Performance of the VAX-11/780 Translation Buffer: Simulation and Measurement [Citation Graph (1, 0)][DBLP]
    ACM Trans. Comput. Syst., 1985, v:3, n:1, pp:31-62 [Journal]
  3. Daniel G. Bobrow, Douglas W. Clark
    Compact Encodings of List Structure. [Citation Graph (1, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1979, v:1, n:2, pp:266-286 [Journal]
  4. Douglas W. Clark
    Measurements of Dynamic List Structure Use in Lisp. [Citation Graph (1, 0)][DBLP]
    IEEE Trans. Software Eng., 1979, v:5, n:1, pp:51-59 [Journal]
  5. Kevin Skadron, Margaret Martonosi, Douglas W. Clark
    A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:199-206 [Conf]
  6. Dileep Bhandarkar, Douglas W. Clark
    Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:310-319 [Conf]
  7. Douglas W. Clark
    Pipelining and Performance in the VAX 8800 Processor. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1987, pp:173-177 [Conf]
  8. Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark
    Formal online methods for voltage/frequency control in multiple clock domain microprocessors. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2004, pp:248-259 [Conf]
  9. Han Chen, Douglas W. Clark, Zhiyan Liu, Grant Wallace, Kai Li, Yuqun Chen
    Software Environments For Cluster-Based Display Systems. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2001, pp:202-211 [Conf]
  10. Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwaran Raman, Douglas W. Clark, David I. August
    Exposing Memory Access Regularities Using Object-Relative Memory Profiling. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:315-324 [Conf]
  11. Kevin Skadron, Douglas W. Clark
    Design Issues and Tradeoffs for Write Buffers. [Citation Graph (0, 0)][DBLP]
    HPCA, 1997, pp:144-155 [Conf]
  12. Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark
    Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:178-189 [Conf]
  13. Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi
    Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:442-445 [Conf]
  14. Pritpal S. Ahuja, Kevin Skadron, Margaret Martonosi, Douglas W. Clark
    Multipath Execution: Opportunities and Limits. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:101-108 [Conf]
  15. Cheng Liao, Dongming Jiang, Liviu Iftode, Margaret Martonosi, Douglas W. Clark
    Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:251-258 [Conf]
  16. Yuanyuan Zhou, Limin Wang, Douglas W. Clark, Kai Li
    Thread Scheduling for Out-of-core Applications with Memory Server on Multicomputers. [Citation Graph (0, 0)][DBLP]
    IOPADS, 1999, pp:57-67 [Conf]
  17. Matthias A. Blumrich, Richard Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, Robert A. Shillner
    Design Choices in the SHRIMP System: An Empirical Study. [Citation Graph (0, 0)][DBLP]
    ISCA, 1998, pp:330-341 [Conf]
  18. Douglas W. Clark, Peter J. Bannon, James B. Keller
    Measuring VAX 8800 Performance with a Histogram Hardware Monitor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1988, pp:176-185 [Conf]
  19. Douglas W. Clark, Henry M. Levy
    Measurement and analysis of instruction use in the VAX-11/780. [Citation Graph (0, 0)][DBLP]
    ISCA, 1982, pp:9-17 [Conf]
  20. Joel S. Emer, Douglas W. Clark
    A Characterization of Processor Performance in the VAX-11/780. [Citation Graph (0, 0)][DBLP]
    ISCA, 1984, pp:301-310 [Conf]
  21. Joel S. Emer, Douglas W. Clark
    Retrospective: Characterization of Processor Performance in the VAX-11/780. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:37-38 [Conf]
  22. Joel S. Emer, Douglas W. Clark
    A Characterization of Processor Performance in the VAX-11/780. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:274-283 [Conf]
  23. Edward W. Felten, Richard Alpert, Angelos Bilas, Matthias A. Blumrich, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Liviu Iftode, Kai Li
    Early Experience with Message-Passing on the SHRIMP Multicomputer. [Citation Graph (0, 0)][DBLP]
    ISCA, 1996, pp:296-307 [Conf]
  24. Gordon Stoll, Bin Wei, Douglas W. Clark, Edward W. Felten, Kai Li, Pat Hanrahan
    Evaluating Multi-Port Frame Buffer Designs for a Mesh-Connected Multicomputer. [Citation Graph (0, 0)][DBLP]
    ISCA, 1995, pp:96-105 [Conf]
  25. Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark
    Managing leakage for transient data: decay and quasi-static 4T memory cells. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:52-55 [Conf]
  26. Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark
    Coordinated, distributed, formal energy management of chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:127-130 [Conf]
  27. Pritpal S. Ahuja, Douglas W. Clark, Anne Rogers
    The performance impact of incomplete bypassing in processor pipelines. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:36-45 [Conf]
  28. Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
    Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:259-271 [Conf]
  29. Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks
    A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. [Citation Graph (0, 0)][DBLP]
    MICRO, 2005, pp:271-282 [Conf]
  30. Cheng Liao, Margaret Martonosi, Douglas W. Clark
    An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 1999, pp:200-201 [Conf]
  31. Cheng Liao, Margaret Martonosi, Douglas W. Clark
    Experience with an Adaptive Globally-Synchronizing Clock Algorithm. [Citation Graph (0, 0)][DBLP]
    SPAA, 1999, pp:106-114 [Conf]
  32. Yuqun Chen, Douglas W. Clark, Adam Finkelstein, Timothy C. Housel, Kai Li
    Automatic alignment of high-resolution multi-projector display using an un-calibrated camera. [Citation Graph (0, 0)][DBLP]
    IEEE Visualization, 2000, pp:125-130 [Conf]
  33. Douglas W. Clark
    An Efficient List-Moving Algorithm Using Constant Workspace. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1976, v:19, n:6, pp:352-354 [Journal]
  34. Douglas W. Clark
    A Fast Algorithm for Copying List Structures. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1978, v:21, n:5, pp:351-357 [Journal]
  35. Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark
    Implementing Decay Techniques using 4T Quasi-Static Memory Cells. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
  36. Grant Wallace, Otto J. Anshus, Peng Bi, Han Chen, Yuqun Chen, Douglas W. Clark, Perry R. Cook, Adam Finkelstein, Thomas A. Funkhouser, Anoop Gupta, Matthew A. Hibbs, Kai Li, Zhiyan Liu, Rudrajit Samanta, Rahul Sukthankar, Olga G. Troyanskaya
    Tools and Applications for Large-Scale Display Walls. [Citation Graph (0, 0)][DBLP]
    IEEE Computer Graphics and Applications, 2005, v:25, n:4, pp:24-33 [Journal]
  37. Kai Li, Han Chen, Yuqun Chen, Douglas W. Clark, Perry R. Cook, Stefanos N. Damianakis, Georg Essl, Adam Finkelstein, Thomas A. Funkhouser, Timothy C. Housel, Allison Klein, Zhiyan Liu, Emil Praun, Rudrajit Samanta, Ben Shedd, Jaswinder Pal Singh, George Tzanetakis, Jiannan Zheng
    Building and Using A Scalable Display Wall System. [Citation Graph (0, 0)][DBLP]
    IEEE Computer Graphics and Applications, 2000, v:20, n:4, pp:29-37 [Journal]
  38. Douglas W. Clark
    A Fast Algorithm for Copying Binary Trees. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1975, v:4, n:3, pp:62-63 [Journal]
  39. Douglas W. Clark, C. Cordell Green
    A Note on Shared List Structure in LISP. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1978, v:7, n:6, pp:312-314 [Journal]
  40. Kevin Skadron, Margaret Martonosi, Douglas W. Clark
    Speculative Updates of Local and Global Branch History: A Quantitative Analysis. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2000, v:2, n:, pp:- [Journal]
  41. Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark
    Formal Control Techniques for Power-Performance Management. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2005, v:25, n:5, pp:52-62 [Journal]
  42. Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks
    Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:1, pp:119-129 [Journal]
  43. Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras
    Implementing branch-predictor decay using quasi-static memory cells. [Citation Graph (0, 0)][DBLP]
    TACO, 2004, v:1, n:2, pp:180-219 [Journal]
  44. Douglas W. Clark, Butler W. Lampson, Kenneth A. Pier
    The Memory System of a High-Performance Personal Computer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:10, pp:715-733 [Journal]
  45. Douglas W. Clark, Lih-Jyh Weng
    Maximal and Near-Maximal Shift Register Seqyences: Efficient Event Counters and Easy Discrete Logarithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:560-568 [Journal]
  46. Kevin Skadron, Pritpal A. Ahuja, Margaret Martonosi, Douglas W. Clark
    Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:11, pp:1260-1281 [Journal]
  47. Douglas W. Clark
    Cache Performance in the VAX-11/780 [Citation Graph (0, 0)][DBLP]
    ACM Trans. Comput. Syst., 1983, v:1, n:1, pp:24-37 [Journal]

Search in 0.003secs, Finished in 0.455secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002