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Jih-Kwon Peir: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kien A. Hua, Chiang Lee, Jih-Kwon Peir
    Interconnecting Shared-Everything Systems for Efficient Parallel Query Processing. [Citation Graph (1, 0)][DBLP]
    PDIS, 1991, pp:262-270 [Conf]
  2. Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
    Overlapping dependent loads with addressless preload. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:275-284 [Conf]
  3. Jih-Kwon Peir, Windsor W. Hsu, Honesty C. Young, Shauchi Ong
    Improving Cache Performance with Balanced Tag and Data Paths. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1996, pp:268-278 [Conf]
  4. Jih-Kwon Peir, Yongjoon Lee, Windsor W. Hsu
    Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:240-250 [Conf]
  5. Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir
    Ditto Processor. [Citation Graph (0, 0)][DBLP]
    DSN, 2002, pp:525-536 [Conf]
  6. Jang-uk In, Canming Jin, Jih-Kwon Peir, Sanjay Ranka, Sartaj Sahni
    A Framework for Matching Applications with Parallel Machines. [Citation Graph (0, 0)][DBLP]
    HiPC, 1999, pp:331-338 [Conf]
  7. Lu Peng, Jih-Kwon Peir, Konrad Lai
    Signature Buffer: Bridging Performance Gap between Registers and Caches. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:164-175 [Conf]
  8. Lishing Liu, Jih-Kwon Peir
    Sampling of Cache Congruence Classes. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:552-557 [Conf]
  9. Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai
    Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:54-61 [Conf]
  10. Jih-Kwon Peir, Windsor W. Hsu
    Fast Cache Access with Full-Map Block Directory. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:578-586 [Conf]
  11. Yann-Hang Lee, Sandra E. Cheung, Jih-Kwon Peir
    Consecutive Requests Traffic Model in Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:534-541 [Conf]
  12. Lishing Liu, Jih-Kwon Peir
    A Performance Evaluation Methodology for Coupled Multiple Supercomputers. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:198-202 [Conf]
  13. Jih-Kwon Peir, Ron Cytron
    Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:217-225 [Conf]
  14. Jih-Kwon Peir, Daniel Gajski
    CAMP: A Programming Aide for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1986, pp:475-482 [Conf]
  15. Jih-Kwon Peir, Kimming So, Ju-Ho Tang
    Inter-Section Locality of Shared Data in Parallel Programs. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:278-286 [Conf]
  16. Jih-Kwon Peir, Kimming So, Ju-Ho Tang
    Techniques to Enhance Cache Performance Across Parallel Program Sections. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:12-19 [Conf]
  17. Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai
    Bloom filtering cache misses for accurate data speculation and prefetching. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:189-198 [Conf]
  18. Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen-Kuang Chen, V. Lee, B. Liang
    Coterminous locality and coterminous group data prefetching on chip-multiprocessors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  19. Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai
    Direct load: dependence-linked dataflow resolution of load address and cache coordinate. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:76-87 [Conf]
  20. Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King
    Performance of Shared Cache on Multithreaded Architectures. [Citation Graph (0, 0)][DBLP]
    PDP, 1996, pp:541-548 [Conf]
  21. Hsiao-Ming Hsu, Jih-Kwon Peir, Dale B. Haidvogel
    Performance of an Ocean Circulation Model on LCAP-Abstract. [Citation Graph (0, 0)][DBLP]
    PPSC, 1987, pp:285- [Conf]
  22. Kien A. Hua, Chiang Lee, Jih-Kwon Peir
    A high performance hybrid architecture for concurrent query execution. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:348-351 [Conf]
  23. Jih-Kwon Peir, Yann-Hang Lee
    Improving multistage network performance under uniform and hot-spot traffics. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:548-551 [Conf]
  24. Daniel Gajski, Jih-Kwon Peir
    Essential Issues in Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1985, v:18, n:6, pp:9-27 [Journal]
  25. Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King
    Performance of Shared Caches on Multithreaded Architectures. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1998, v:14, n:2, pp:499-514 [Journal]
  26. Kien A. Hua, Chiang Lee, Jih-Kwon Peir
    A High Performance Hybrid Architecture for Concurrent Query Execution. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1993, v:9, n:2, pp:177-199 [Journal]
  27. Wei-Tsung Sun, Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King
    Shared Translation Lookaside Buffers on Multiprocessors and a Performance Study. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1993, v:9, n:1, pp:123-135 [Journal]
  28. Jih-Kwon Peir, Yann-Hang Lee
    Look-Ahead Routing Switches for Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1993, v:19, n:1, pp:1-10 [Journal]
  29. Daniel Gajski, Jih-Kwon Peir
    Comparison of five multiprocessor systems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1985, v:2, n:3, pp:265-282 [Journal]
  30. Kien A. Hua, Lishing Liu, Jih-Kwon Peir
    Designing High-Performance Processors Using Real Address Prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:9, pp:1146-1151 [Journal]
  31. Jih-Kwon Peir, Ron Cytron
    Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:8, pp:1203-1211 [Journal]
  32. Jih-Kwon Peir, Windsor W. Hsu, Alan Jay Smith
    Functional Implementation Techniques for CPU Cache Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:100-110 [Journal]
  33. Lishing Liu, Jih-Kwon Peir
    Cache sampling by sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:2, pp:98-105 [Journal]
  34. Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai
    Address-free memory access based on program syntax correlation of loads and stores. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:3, pp:314-324 [Journal]

  35. Comparative evaluation of multi-core cache occupancy strategies. [Citation Graph (, )][DBLP]


  36. Fit a Spread Estimator in Small Memory. [Citation Graph (, )][DBLP]


  37. Greedy Prefix Cache for IP Routing Lookups. [Citation Graph (, )][DBLP]


  38. Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility. [Citation Graph (, )][DBLP]


  39. Weak execution ordering - exploiting iterative methods on many-core GPUs. [Citation Graph (, )][DBLP]


  40. Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study. [Citation Graph (, )][DBLP]


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