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Erik R. Altman: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Byung-Sun Yang, Soo-Mook Moon, Seongbae Park, Junpyo Lee, SeungIl Lee, Jinpyo Park, Yoo C. Chung, Suhyun Kim, Kemal Ebcioglu, Erik R. Altman
    LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:128-138 [Conf]
  2. Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
    A Theory for Software-Hardware Co-Scheduling for ASIPs and Embedded Processors. [Citation Graph (0, 0)][DBLP]
    ASAP, 2000, pp:329-338 [Conf]
  3. Michael Gschwind, Erik R. Altman
    Precise Exception Semantics in Dynamic Compilation. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:95-110 [Conf]
  4. Laurie J. Hendren, Guang R. Gao, Erik R. Altman, Chandrika Mukerji
    A Register Allocation Framework Based on Hierarchical Cyclic Interval Graphs. [Citation Graph (0, 0)][DBLP]
    CC, 1992, pp:176-191 [Conf]
  5. Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
    A Framework for Resource-Constrained Rate-Optimal Software Pipelining. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1994, pp:640-651 [Conf]
  6. Erik R. Altman, Guang R. Gao
    Optimal Software Pipelining Through Enumeration of Schedules. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:833-840 [Conf]
  7. Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind
    Execution-Based Scheduling for VLIW Architectures. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:1269-1280 [Conf]
  8. Guoning Liao, Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
    A Comparative Study of Multiprocessor List Scheduling Heuristics. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:68-77 [Conf]
  9. Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
    Co-Scheduling Hardware and Software Pipelines. [Citation Graph (0, 0)][DBLP]
    HPCA, 1996, pp:52-61 [Conf]
  10. Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
    A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy. [Citation Graph (0, 0)][DBLP]
    ICGA, 1993, pp:392-399 [Conf]
  11. Michael Gschwind, Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye
    Binary translation and architecture convergence issues for IBM system/390. [Citation Graph (0, 0)][DBLP]
    ICS, 2000, pp:336-347 [Conf]
  12. Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Erik R. Altman, Guang R. Gao
    An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:168-175 [Conf]
  13. Kemal Ebcioglu, Erik R. Altman
    DAISY: Dynamic Compilation for 100% Architectural Compatibility. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:26-37 [Conf]
  14. SeungIl Lee, Byung-Sun Yang, Suhyun Kim, Seongbae Park, Soo-Mook Moon, Kemal Ebcioglu, Erik R. Altman
    Efficient Java exception handling in just-in-time compilation. [Citation Graph (0, 0)][DBLP]
    Java Grande, 2000, pp:1-8 [Conf]
  15. Erik R. Altman, Guang R. Gao, Ramaswamy Govindarajan
    An Experimental Study of an ILP-based Exact Solution Method for Software Pipelining. [Citation Graph (0, 0)][DBLP]
    LCPC, 1995, pp:16-30 [Conf]
  16. Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind
    Optimizations and Oracle Parallelism with Dynamic Translation. [Citation Graph (0, 0)][DBLP]
    MICRO, 1999, pp:284-0 [Conf]
  17. Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
    Minimizing register requirements under resource-constrained rate-optimal software pipelining. [Citation Graph (0, 0)][DBLP]
    MICRO, 1994, pp:85-94 [Conf]
  18. Erik R. Altman, Ramaswamy Govindarajan, Guang R. Gao
    Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards. [Citation Graph (0, 0)][DBLP]
    PLDI, 1995, pp:139-150 [Conf]
  19. Erik R. Altman, David R. Kaeli, Yaron Sheffer
    Welcome to the Opportunities of Binary Translation. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2000, v:33, n:3, pp:40-45 [Journal]
  20. Michael Gschwind, Erik R. Altman, Sumedh W. Sathaye, Paul Ledak, David Appenzeller
    Dynamic and Transparent Binary Translation. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2000, v:33, n:3, pp:54-59 [Journal]
  21. Erik R. Altman, Sumedh W. Sathaye
    Preface. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2006, v:50, n:2-3, pp:169-171 [Journal]
  22. Erik R. Altman, Guang R. Gao
    Optimal Modulo Scheduling Through Enumeration. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 1998, v:26, n:2, pp:313-344 [Journal]
  23. Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Erik R. Altman, Guang R. Gao
    Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2000, v:28, n:1, pp:1-46 [Journal]
  24. Erik R. Altman, Ramaswamy Govindarajan, Guang R. Gao
    A Unified Framework for Instruction Scheduling and Mapping for Function Units with Structural Hazards. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1998, v:49, n:2, pp:259-293 [Journal]
  25. Erik R. Altman, David R. Kaeli
    WBT-2000: workshop on binary translation - 2000. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2001, v:29, n:1, pp:23-25 [Journal]
  26. Erik R. Altman, David R. Kaeli
    Workshop on binary translation - 2001. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2001, v:29, n:5, pp:84-85 [Journal]
  27. Michael Gschwind, Erik R. Altman
    Optimization and precise exceptions in dynamic compilation. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2001, v:29, n:1, pp:66-74 [Journal]
  28. Kemal Ebcioglu, Erik R. Altman, Michael Gschwind, Sumedh W. Sathaye
    Dynamic Binary Translation and Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:6, pp:529-548 [Journal]
  29. Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
    A Framework for Resource-Constrained Rate-Optimal Software Pipelining. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:11, pp:1133-1149 [Journal]
  30. Byung-Sun Yang, Junpyo Lee, SeungIl Lee, Seongbae Park, Yoo C. Chung, Suhyun Kim, Kemal Ebcioglu, Erik R. Altman, Soo-Mook Moon
    Efficient Register Mapping and Allocation in LaTTe, an Open-Source Java Just-in-Time Compiler. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:1, pp:57-69 [Journal]

  31. 05101 Executive Summary - Scheduling for Parallel Architectures: Theory, Applications, Challenges. [Citation Graph (, )][DBLP]


  32. 05101 Abstracts Collection - Scheduling for Parallel Architectures: Theory, Applications, Challenges. [Citation Graph (, )][DBLP]


  33. Panel Discussion: Architectures for the Future. [Citation Graph (, )][DBLP]


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