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Kazuo Taki: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kazuo Taki
    Parallel Inference Machine PIM. [Citation Graph (1, 0)][DBLP]
    FGCS, 1992, pp:50-72 [Conf]
  2. Minoru Yokota, Akira Yamamoto, Kazuo Taki, Hiroshi Nishikawa, Shunichi Uchida
    The Design and Implementation of a Personal Sequential Inference Machine: PSI. [Citation Graph (1, 0)][DBLP]
    New Generation Comput., 1983, v:1, n:2, pp:125-144 [Journal]
  3. Masahiro Yasugi, Shegeyuki Eguchi, Kazuo Taki
    Eliminating Bottlenecks on Parallel Systems using Adaptive Objects. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:80-87 [Conf]
  4. Mitsuya Fukazawa, Koichiro Noguchi, Makoto Nagata, Kazuo Taki
    A built-in power supply noise probe for digital LSIs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:106-107 [Conf]
  5. Hirofumi Sakamoto, Ken'ichiro Uda, Bu-Y. Lee, Hiroyuki Ochi, Kazuo Taki, Takao Tsuda
    A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:33-34 [Conf]
  6. Kazuo Taki
    A Survey for Pass-Transistor Logic Technologies - Recent Researches and Developments and Future Prospects (Embedded Tutorial). [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:223-226 [Conf]
  7. Kazuo Taki, Katsuto Nakajima, Hiroshi Nakashima, Morihiro Ikeda
    Performance and Architectural Evaluation of the PSI Machine. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1987, pp:128-135 [Conf]
  8. Tsuyoshi Shinogi, Terumine Hayashi, Kazuo Taki
    Test Generation for Stuck-On Faults in BDD-Based Pass-Transistor Logic SPL. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:16-21 [Conf]
  9. Katsuto Nakajima, Hiroshi Nakashima, Minoru Yokota, Kazuo Taki, Shunichi Uchida, Hiroshi Nishikawa, Akira Yamamoto, Masaki Mitsui
    Evaluation of PSI Micro-Interpreter. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1986, pp:173-177 [Conf]
  10. Kanae Masuda, Hirokazu Ishizuka, Hiroaki Iwayama, Kazuo Taki, Eiji Sugino
    Preliminary Evaluation of the Connection Network for the Multi-PSI System. [Citation Graph (0, 0)][DBLP]
    ECAI, 1988, pp:18-23 [Conf]
  11. Hiroshi Date, Yukinori Matsumoto, Kouichi Kimura, Kazuo Taki, Hiroo Kato, Masahiro Hoshi
    LSI-CAD Programs on Parallel Inference Machine. [Citation Graph (0, 0)][DBLP]
    FGCS, 1992, pp:237-247 [Conf]
  12. Atsuhiro Goto, Masatoshi Sato, Katsuto Nakajima, Kazuo Taki, Akira Matsumoto
    Overview of the Parallel Inference Machine Architecture (PIM). [Citation Graph (0, 0)][DBLP]
    FGCS, 1988, pp:208-229 [Conf]
  13. Keiji Hirata, Reki Yamamoto, Akira Imai, Hideo Kawai, Kiyoshi Hirano, Tsuneyoshi Takagi, Kazuo Taki, Akihiko Nakase, Kazuaki Rokusawa
    Parallel and Distributed Implementation of Concurrent Logic Programming Language KL1. [Citation Graph (0, 0)][DBLP]
    FGCS, 1992, pp:436-459 [Conf]
  14. Yukinori Matsumoto, Kazuo Taki
    Parallel Logic Simulator based on Time Warp and its Evaluation. [Citation Graph (0, 0)][DBLP]
    FGCS, 1992, pp:1198-1206 [Conf]
  15. Katsumi Nitta, Kazuo Taki, Nobuyuki Ichiyoshi
    Experimental Parallel Inference Software. [Citation Graph (0, 0)][DBLP]
    FGCS, 1992, pp:166-190 [Conf]
  16. Yasutaka Takeda, Hiroshi Nakashima, Kanae Masuda, Takashi Chikayama, Kazuo Taki
    A Load Balancing Mechanism for Large Scale Multiprocessor Systems and its Implementation. [Citation Graph (0, 0)][DBLP]
    FGCS, 1988, pp:978-986 [Conf]
  17. Kazuo Taki
    Towards the General-Purpose Parallel Processing System, Panel Position Paper. [Citation Graph (0, 0)][DBLP]
    FGCS, 1992, pp:1074-1075 [Conf]
  18. Kazuo Taki, Minoru Yokota, Akira Yamamoto, Hiroshi Nishikawa, Shunichi Uchida, Hiroshi Nakashima, Akitoshi Mitsuishi
    Hardware Design and Implementation of the Personal Sequential Inference Machine (PSI). [Citation Graph (0, 0)][DBLP]
    FGCS, 1984, pp:398-409 [Conf]
  19. Shunichi Uchida, Kazuo Taki, Katsuto Nakajima, Atsuhiro Goto, Takashi Chikayama
    Research and Development of the Parallel Inference System in the Intermediate Stage of the FGCS Project. [Citation Graph (0, 0)][DBLP]
    FGCS, 1988, pp:16-36 [Conf]
  20. Minoru Yokota, Akira Yamamoto, Kazuo Taki, Hiroshi Nishikawa, Shunichi Uchida, Katsuto Nakajima, Masaki Mitsui
    A Microprogrammed Interpreter for the Personal Sequential Inference Machine. [Citation Graph (0, 0)][DBLP]
    FGCS, 1984, pp:410-418 [Conf]
  21. M. Ichiyoshi, T. Miyazaki, Kazuo Taki
    A Distributed Implementation of Flat GHC on the Multi-PSI. [Citation Graph (0, 0)][DBLP]
    ICLP, 1987, pp:257-275 [Conf]
  22. Kazuo Taki
    Parallel Programming and Large-scale Applications in the FGCS Project. [Citation Graph (0, 0)][DBLP]
    ICLP, 1991, pp:949- [Conf]
  23. Kazuo Taki
    The FGCS Computing Architecture. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1989, pp:627-632 [Conf]
  24. Masakazu Furuichi, Kazuo Taki, Nobuyuki Ichiyoshi
    A Multi-Level Load Balancing Scheme for OR-Parallel Exhaustive Search Programs on the Multi-PSI. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1990, pp:50-59 [Conf]
  25. Shunichi Uchida, Minoru Yokota, Akira Yamamoto, Kazuo Taki, Hiroshi Nishikawa
    Outline of the Personal Sequential Inference Machine: PSI. [Citation Graph (0, 0)][DBLP]
    New Generation Comput., 1983, v:1, n:1, pp:75-79 [Journal]
  26. Shuusuke Haruna, Norio Sanada, Hisayuki Kinoh, Kazutoshi Sumiya, Kazuo Taki
    A GUI software development system for digital AV applications. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 2003, v:34, n:7, pp:99-107 [Journal]
  27. Tsuyoshi Shinogi, Terumine Hayashi, Kazuo Taki
    Test generation for stuck-on faults in pass-transistor logic SPL and implementation of DFT circuits. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:7, pp:55-68 [Journal]

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