The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Evanthia Papadopoulou: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Evanthia Papadopoulou, D. T. Lee
    Shortest Paths in a Simple Polygon in the Presence of Forbidden Vertices. [Citation Graph (0, 0)][DBLP]
    CCCG, 1994, pp:110-115 [Conf]
  2. Oswin Aichholzer, Franz Aurenhammer, Danny Z. Chen, D. T. Lee, Asish Mukhopadhyay, Evanthia Papadopoulou
    Voronoi Diagrams for Direction-Sensitive Distances. [Citation Graph (0, 0)][DBLP]
    Symposium on Computational Geometry, 1997, pp:418-420 [Conf]
  3. Evanthia Papadopoulou, D. T. Lee
    Efficient Computation of the Geodesic Voronoi Diagram of Points in a Simple Polygon (Extended Abstract). [Citation Graph (0, 0)][DBLP]
    ESA, 1995, pp:238-251 [Conf]
  4. Evanthia Papadopoulou, Theodore S. Papatheodorou
    Least-Squares Iterative Solution on a Fixed-Size VLSI Architecture. [Citation Graph (0, 0)][DBLP]
    ICS, 1987, pp:914-925 [Conf]
  5. Evanthia Papadopoulou
    k-Pairs Non-Crossing Shortest Paths in a Simple Polygon. [Citation Graph (0, 0)][DBLP]
    ISAAC, 1996, pp:305-314 [Conf]
  6. Evanthia Papadopoulou
    Linfinity Voronoi Diagrams and Applications to VLSI Layout and Manufacturing. [Citation Graph (0, 0)][DBLP]
    ISAAC, 1998, pp:9-18 [Conf]
  7. Evanthia Papadopoulou, D. T. Lee
    The Min-Max Voronoi Diagram of Polygons and Applications in VLSI Manufacturing. [Citation Graph (0, 0)][DBLP]
    ISAAC, 2002, pp:511-522 [Conf]
  8. Evanthia Papadopoulou
    Critical area computation for missing material defects in VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISPD, 2000, pp:140-146 [Conf]
  9. Evanthia Papadopoulou, D. T. Lee
    Critical area computation - a new approach. [Citation Graph (0, 0)][DBLP]
    ISPD, 1998, pp:89-94 [Conf]
  10. Evanthia Papadopoulou
    On the Hausdorff Voronoi Diagram of Point Clusters in the Plane. [Citation Graph (0, 0)][DBLP]
    WADS, 2003, pp:439-450 [Conf]
  11. Evanthia Papadopoulou
    The Hausdorff Voronoi Diagram of Point Clusters in the Plane. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 2004, v:40, n:2, pp:63-82 [Journal]
  12. Evanthia Papadopoulou, D. T. Lee
    A New Approach for the Geodesic Voronoi Diagram of Points in a Simple Polygon and Other Restricted Polygonal Domains. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 1998, v:20, n:4, pp:319-352 [Journal]
  13. Oswin Aichholzer, Franz Aurenhammer, Danny Z. Chen, D. T. Lee, Evanthia Papadopoulou
    Skew Voronoi Diagrams. [Citation Graph (0, 0)][DBLP]
    Int. J. Comput. Geometry Appl., 1999, v:9, n:3, pp:235-0 [Journal]
  14. Evanthia Papadopoulou
    k-Pairs Non-Crossing Shortest Paths in a Simple Polygon. [Citation Graph (0, 0)][DBLP]
    Int. J. Comput. Geometry Appl., 1999, v:9, n:6, pp:533-0 [Journal]
  15. Evanthia Papadopoulou, D. T. Lee
    The Linfty-Voronoi Diagram of Segments and VLSI Applications. [Citation Graph (0, 0)][DBLP]
    Int. J. Comput. Geometry Appl., 2001, v:11, n:5, pp:503-528 [Journal]
  16. Evanthia Papadopoulou, D. T. Lee
    The hausdorff voronoi diagram of polygonal objects: a divide and conquer approach. [Citation Graph (0, 0)][DBLP]
    Int. J. Comput. Geometry Appl., 2004, v:14, n:6, pp:421-452 [Journal]
  17. Zhenming Chen, Evanthia Papadopoulou, Jinhui Xu
    Robustness of k-gon Voronoi diagram construction. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 2006, v:97, n:4, pp:138-145 [Journal]
  18. D. T. Lee, Evanthia Papadopoulou
    The All-Pairs Quickest Path Problem. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1993, v:45, n:5, pp:261-267 [Journal]
  19. Evanthia Papadopoulou
    Critical area computation for missing material defects in VLSIcircuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:5, pp:583-597 [Journal]
  20. Evanthia Papadopoulou, D. T. Lee
    Critical area computation via Voronoi diagrams. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:4, pp:463-474 [Journal]

  21. Higher Order Voronoi Diagrams of Segments for VLSI Critical Area Extraction. [Citation Graph (, )][DBLP]


  22. Computing the Map of Geometric Minimal Cuts. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002