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Padma Raghavan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Keita Teranishi, Padma Raghavan, Zi-Kui Liu
    Towards a Grid enabled system for multicomponent materials design. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2004, pp:664-669 [Conf]
  2. Jack Dongarra, Padma Raghavan
    A Grid Computing Environment for Enabling Large Scale Quantum Mechanical Simulations. [Citation Graph (0, 0)][DBLP]
    GRID, 2000, pp:102-110 [Conf]
  3. Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
    Characterizing the Performance and Energy Attributes of Scientific Simulations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2006, pp:242-249 [Conf]
  4. Sanjukta Bhowmick, Padma Raghavan, Keita Teranishi
    A Combinatorial Scheme for Developing Efficient Composite Solvers. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (2), 2002, pp:325-334 [Conf]
  5. Konrad Malkowski, Padma Raghavan
    Multi-pass Mapping Schemes for Parallel Sparse Matrix Computations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2005, pp:245-255 [Conf]
  6. Sanjukta Bhowmick, Lois C. McInnes, Boyana Norris, Padma Raghavan
    The Role of Multi-method Linear Solvers in PDE-based Simulations. [Citation Graph (0, 0)][DBLP]
    ICCSA (1), 2003, pp:828-839 [Conf]
  7. Keita Teranishi, Padma Raghavan, Chao Yang
    Time-Memory Trade-Offs Using Sparse Matrix Methods for Large-Scale Eigenvalue Problems. [Citation Graph (0, 0)][DBLP]
    ICCSA (1), 2003, pp:840-847 [Conf]
  8. Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir, Padma Raghavan
    Reducing Power with Performance Constraints for Parallel Sparse Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  9. Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
    Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  10. Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
    On improving performance and energy profiles of sparse scientific applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  11. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Integrated link/CPU voltage scaling for reducing energy consumption of parallel sparse matrix applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  12. Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
    Conjugate gradient sparse solvers: performance-power characteristics. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  13. Padma Raghavan
    Advanced Algorithms and Software Components for Scientific Computing: An Introduction. [Citation Graph (0, 0)][DBLP]
    PARA, 2004, pp:590-592 [Conf]
  14. Keita Teranishi, Padma Raghavan
    Parallel Hybrid Sparse Solvers Through Flexible Incomplete Cholesky Preconditioning. [Citation Graph (0, 0)][DBLP]
    PARA, 2004, pp:637-643 [Conf]
  15. Esmond G. Ng, Padma Raghavan
    Incomplete Cholesky Parallel Preconditioners with Selective Inversion. [Citation Graph (0, 0)][DBLP]
    PPSC, 1999, pp:- [Conf]
  16. Keita Teranishi, Padma Raghavan, Esmond G. Ng
    Scalable Preconditioning Using Incomplete Factors. [Citation Graph (0, 0)][DBLP]
    PPSC, 2001, pp:- [Conf]
  17. Keita Teranishi, Padma Raghavan, Esmond G. Ng
    A new data-mapping scheme for latency-tolerant distributed sparse triangular solution. [Citation Graph (0, 0)][DBLP]
    SC, 2002, pp:1-11 [Conf]
  18. Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
    Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:146- [Conf]
  19. S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan
    Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:138- [Conf]
  20. Esmond G. Ng, Padma Raghavan
    Towards a Scalable Hybrid Sparse Solver. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 2000, v:12, n:2-3, pp:53-68 [Journal]
  21. Sanjukta Bhowmick, Padma Raghavan, Lois C. McInnes, Boyana Norris
    Faster PDE-based simulations using robust composite linear solvers. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 2004, v:20, n:3, pp:373-387 [Journal]
  22. Xiaoyan Zhang, Michael W. Berry, Padma Raghavan
    Level search schemes for information filtering and retrieval. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Manage., 2001, v:37, n:2, pp:313-334 [Journal]
  23. Padma Raghavan
    Parallel Ordering Using Edge Contraction. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1997, v:23, n:8, pp:1045-1067 [Journal]
  24. Padma Raghavan
    Efficient Parallel Sparse Triangular Solution Using Selective Inversion. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1998, v:8, n:1, pp:29-40 [Journal]
  25. S. Conner, Sayaka Akioka, Mary Jane Irwin, Padma Raghavan
    Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  26. Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
    Memory Optimizations For Fast Power-Aware Sparse Computations. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  27. Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin
    Load Miss Prediction - Exploiting Power Performance Trade-offs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  28. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Reducing energy consumption of parallel sparse matrix applications through integrated link/CPU voltage scaling. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2007, v:41, n:3, pp:179-213 [Journal]

  29. Ring Prediction for Non-Uniform Cache Architectures. [Citation Graph (, )][DBLP]


  30. Markov Model Based Disk Power Management for Data Intensive Workloads. [Citation Graph (, )][DBLP]


  31. Hybrid Techniques for Fast Multicore Simulation. [Citation Graph (, )][DBLP]


  32. Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. [Citation Graph (, )][DBLP]


  33. Towards Low-Cost, High-Accuracy Classifiers for Linear Solver Selection. [Citation Graph (, )][DBLP]


  34. Ring data location prediction scheme for Non-Uniform Cache Architectures. [Citation Graph (, )][DBLP]


  35. Managing power, performance and reliability trade-offs. [Citation Graph (, )][DBLP]


  36. Towards energy efficient scaling of scientific codes. [Citation Graph (, )][DBLP]


  37. A helper thread based EDP reduction scheme for adapting application execution in CMPs. [Citation Graph (, )][DBLP]


  38. Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. [Citation Graph (, )][DBLP]


  39. Analysis of the IPv4 Address Space Delegation Structure. [Citation Graph (, )][DBLP]


  40. Phase-aware adaptive hardware selection for power-efficient scientific computations. [Citation Graph (, )][DBLP]


  41. Intra-application shared cache partitioning for multithreaded applications. [Citation Graph (, )][DBLP]


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