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Publications of Author

1. Kuen-Cheng Chiang, Zhi-Wei Chen, Jean Jyh-Jiun Shann
   Design and implementation of a reconfigurable hardware for secure embedded systems. [Citation Graph (0, 0)][DBLP]
   ASIACCS, 2006, pp:364- [Conf]
   
2. Zhi-Wei Chen, Yu-Cheng Lin, Cheng-Chin Chiang
   In this paper, an approach for deaf-people. [Citation Graph (0, 0)][DBLP]
   ICPR (2), 2006, pp:104-107 [Conf]
   
3. Chin-Hao Hsu, Zhih-Wei Chen, Cheng-Chin Chiang
   Region-Based Color Correction of Images. [Citation Graph (0, 0)][DBLP]
   ICITA (1), 2005, pp:710-715 [Conf]
   
4. Jin-Tai Yan, Zhi-Wei Chen, Ming-Yuen Wu
   Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:3395-3398 [Conf]
   
5. 
   IO connection assignment and RDL routing for flip-chip designs. [Citation Graph (, )][DBLP]
   
   
6. 
   Two-sided single-detour untangling for bus routing. [Citation Graph (, )][DBLP]
   
   
7. 
   Redundant wire insertion for yield improvement. [Citation Graph (, )][DBLP]
   
   
8. 
   RDL pre-assignment routing for flip-chip designs. [Citation Graph (, )][DBLP]
   
   
9. 
   Ordered escape routing via routability-driven pin assignment. [Citation Graph (, )][DBLP]
   
   
10. 
    Resource-constrained timing-driven link insertion for critical delay reduction. [Citation Graph (, )][DBLP]
    
    
11. 
    The research of sampling frequency for A DC servo motor speed control system based on neural networks. [Citation Graph (, )][DBLP]
    
    
12. 
    Continuous K-Nearest Neighbor Query over Moving Objects in Road Networks. [Citation Graph (, )][DBLP]
    
    
13. 
    Optimal Network Analysis in Hierarchical Power Quad-Grids. [Citation Graph (, )][DBLP]