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Mohamed M. Zahran: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Anasua Bhowmik, Mohamed M. Zahran
    Bandwidth-Friendly Cache Hierarchy. [Citation Graph (0, 0)][DBLP]
    CDES, 2006, pp:153-159 [Conf]
  2. Mohamed M. Zahran, Manoj Franklin
    RHT: A Context-Based Return Address Predictor. [Citation Graph (0, 0)][DBLP]
    CDES, 2006, pp:17-23 [Conf]
  3. Mohamed M. Zahran, Manoj Franklin
    Return-Address Prediction in Speculative Multithreaded Environments. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:609-619 [Conf]
  4. Mohamed M. Zahran, Manoj Franklin
    Dynamic Thread Resizing for Speculative Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:313-0 [Conf]
  5. François Cantonnet, Yiyi Yao, Mohamed M. Zahran, Tarek A. El-Ghazawi
    Productivity Analysis of the UPC Language. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  6. Mohamed M. Zahran, Manoj Franklin
    A Feasibility Study of Hierarchical Multithreading. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  7. Mohamed M. Zahran
    On cache memory hierarchy for Chip-Multiprocessor. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2003, v:31, n:1, pp:39-48 [Journal]

  8. Chip level thermal profile estimation using on-chip temperature sensors. [Citation Graph (, )][DBLP]


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