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Mitchell J. Myjak:
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- Daniel R. Blum, Mitchell J. Myjak, José G. Delgado-Frias
Enhanced Fault-Tolerant Data Latches for Deep Submicron CMOS. [Citation Graph (0, 0)][DBLP] CDES, 2005, pp:28-34 [Conf]
- Mitchell J. Myjak, José G. Delgado-Frias
A Symmetric Differential Clock Generator for Bit-Serial Hardware. [Citation Graph (0, 0)][DBLP] CDES, 2005, pp:159-164 [Conf]
- Mitchell J. Myjak, Fredrick L. Anderson, José G. Delgado-Frias
H-Tree Interconnection Structure for Reconfigurable DSP Hardware. [Citation Graph (0, 0)][DBLP] ERSA, 2004, pp:170-176 [Conf]
- Mitchell J. Myjak, José G. Delgado-Frias
Pipelined Multipliers for Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP] IPDPS, 2004, pp:- [Conf]
- Mitchell J. Myjak, José G. Delgado-Frias
A Two-Level Reconfigurable Architecture for Digital Signal Processing. [Citation Graph (0, 0)][DBLP] VLSI, 2003, pp:21-27 [Conf]
- Mitchell J. Myjak, José G. Delgado-Frias
Superpipelined reconfigurable hardware for DSP. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
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