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Alice C. Parker :
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Hamideh Afsarmanesh , Dennis McLeod , David Knapp , Alice C. Parker An Extensible Object-Oriented Approach to Databases for VLSI/CAD. [Citation Graph (16, 2)][DBLP ] VLDB, 1985, pp:13-24 [Conf ] John J. Granacki Jr. , Alice C. Parker PHRAN-SPAN: A Natural Language Interface for System Specifications. [Citation Graph (1, 0)][DBLP ] DAC, 1987, pp:416-422 [Conf ] Alice C. Parker , Aaron K. Friesz , Afshaneh Pakdaman Towards a Nanoscale Artificial Cortex. [Citation Graph (0, 0)][DBLP ] CDES, 2006, pp:227-241 [Conf ] Changsoo Jeong , Alice C. Parker 3D Tree-Structured Object Tracking for Autonomous Ground Vehicles. [Citation Graph (0, 0)][DBLP ] CRV, 2007, pp:266-273 [Conf ] Y. G. DeCastelo-Vide-e-Souza , Miodrag Potkonjak , Alice C. Parker Optimal ILP-Based Approach for Throughput Optimization Using Simultaneous Algorithm/Architecture Matching and Retiming. [Citation Graph (0, 0)][DBLP ] DAC, 1995, pp:113-118 [Conf ] Pravil Gupta , Chih-Tung Chen , J. C. DeSouza-Batista , Alice C. Parker Experience with Image Compression Chip Design using Unified System Construction Tools. [Citation Graph (0, 0)][DBLP ] DAC, 1994, pp:250-256 [Conf ] Yung-Hua Hung , Alice C. Parker High-Level Synthesis with Pin Constraints for Multiple-Chip Designs. [Citation Graph (0, 0)][DBLP ] DAC, 1992, pp:231-234 [Conf ] Zia Iqbal , Miodrag Potkonjak , Sujit Dey , Alice C. Parker Critical Path Minimization Using Retiming and Algebraic Speed-Up. [Citation Graph (0, 0)][DBLP ] DAC, 1993, pp:573-577 [Conf ] Rajiv Jain , Kayhan Küçükçakar , Mitch J. Mlinar , Alice C. Parker Experience with ADAM Synthesis System. [Citation Graph (0, 0)][DBLP ] DAC, 1989, pp:56-61 [Conf ] Rajiv Jain , Alice C. Parker , Nohbyung Park Predicting Area-Time Tradeoffs for Pipelined Design. [Citation Graph (0, 0)][DBLP ] DAC, 1987, pp:35-41 [Conf ] Rajiv Jain , Alice C. Parker , Nohbyung Park Module Selection for Pipelined Synthesis. [Citation Graph (0, 0)][DBLP ] DAC, 1988, pp:542-547 [Conf ] David Knapp , Alice C. Parker A design utility manager: the ADAM planning engine. [Citation Graph (0, 0)][DBLP ] DAC, 1986, pp:48-54 [Conf ] Kayhan Küçükçakar , Alice C. Parker Data Path Tradeoffs Using MABAL. [Citation Graph (0, 0)][DBLP ] DAC, 1990, pp:511-516 [Conf ] Kayhan Küçükçakar , Alice C. Parker CHOP: A Constraint-Driven System-Level Partitioner. [Citation Graph (0, 0)][DBLP ] DAC, 1991, pp:514-519 [Conf ] Fadi J. Kurdahi , Alice C. Parker PLEST: a program for area estimation of VLSI integrated circuits. [Citation Graph (0, 0)][DBLP ] DAC, 1986, pp:467-473 [Conf ] Fadi J. Kurdahi , Alice C. Parker REAL: a program for REgister ALlocation. [Citation Graph (0, 0)][DBLP ] DAC, 1987, pp:210-215 [Conf ] Michael C. McFarland , Alice C. Parker , Raul Camposano Tutorial on High-Level Synthesis. [Citation Graph (0, 0)][DBLP ] DAC, 1988, pp:330-336 [Conf ] Nohbyung Park , Alice C. Parker Sehwa: a program for synthesis of pipelines. [Citation Graph (0, 0)][DBLP ] DAC, 1986, pp:454-460 [Conf ] Alice C. Parker , Pravil Gupta , Agha Hussain The Effects of Physical Design Characteristics on the Area-Performance Tradeoff Curve. [Citation Graph (0, 0)][DBLP ] DAC, 1991, pp:530-534 [Conf ] Alice C. Parker , Jorge T. Pizarro , Mitch J. Mlinar MAHA: a program for datapath synthesis. [Citation Graph (0, 0)][DBLP ] DAC, 1986, pp:461-466 [Conf ] Shiv Prakash , Alice C. Parker Synthesis of Application-Specific Multiprocessor Architectures. [Citation Graph (0, 0)][DBLP ] DAC, 1991, pp:8-13 [Conf ] Yosef Gavriel Tirat-Gefen , Diógenes Cecilio da Silva Jr. , Alice C. Parker Incorporating Imprecise Computation into System-Level Design of Application-Specific Heterogeneous Multiprocessors. [Citation Graph (0, 0)][DBLP ] DAC, 1997, pp:58-63 [Conf ] Jen-Pin Weng , Alice C. Parker 3D Scheduling: High-Level Synthesis with Floorplanning. [Citation Graph (0, 0)][DBLP ] DAC, 1991, pp:668-673 [Conf ] John J. Granacki , David Knapp , Alice C. Parker The ADAM advanced design automation system: overview, planner and natural language interface. [Citation Graph (0, 0)][DBLP ] DAC, 1985, pp:727-730 [Conf ] Nohbyung Park , Alice C. Parker Synthesis of optimal clocking schemes. [Citation Graph (0, 0)][DBLP ] DAC, 1985, pp:489-495 [Conf ] Sami J. Habib , Alice C. Parker Exploring network topology evolution through evolutionary computations. [Citation Graph (0, 0)][DBLP ] GECCO, 2006, pp:779-780 [Conf ] Miodrag Potkonjak , Sujit Dey , Zia Iqbal , Alice C. Parker High Performance Embedded System Optimization Using Algebraic and Generalized Retiming Techniques. [Citation Graph (0, 0)][DBLP ] ICCD, 1993, pp:498-504 [Conf ] John J. Granacki Jr. , Alice C. Parker , Yigal Arens Understanding System Specifications Written in Natural Language. [Citation Graph (0, 0)][DBLP ] IJCAI, 1987, pp:688-691 [Conf ] Paul E. Dworak , Alice C. Parker An Input Interface for Real-Time Digital Sound Generation System. [Citation Graph (0, 0)][DBLP ] ISCA, 1976, pp:68-73 [Conf ] Paul E. Dworak , Alice C. Parker , Richard Blum The Design and Implementation of a Real-Time Sound Generation System. [Citation Graph (0, 0)][DBLP ] ISCA, 1977, pp:153-158 [Conf ] James W. Gault , Alice C. Parker The Design of a User-Programmable Digital Interface. [Citation Graph (0, 0)][DBLP ] ISCA, 1976, pp:121- [Conf ] Alice C. Parker , Andrew W. Nagle Hardware/Software Tradeoffs in A Variable Word Width, Variable Queue Length Buffer Memory. [Citation Graph (0, 0)][DBLP ] ISCA, 1977, pp:159-164 [Conf ] Alice C. Parker , Andrew W. Nagle Description and Simulation of Microcode Execution. [Citation Graph (0, 0)][DBLP ] ISCA, 1978, pp:159-165 [Conf ] Alice C. Parker , Louis J. Hafer The Application of a Hardware Descriptive Language for Design Automation. [Citation Graph (0, 0)][DBLP ] Jerusalem Conference on Information Technology, 1978, pp:349-355 [Conf ] Sami J. Habib , Alice C. Parker Computer-aided system integration for data-intensive multimedia applications (poster session). [Citation Graph (0, 0)][DBLP ] ACM Multimedia, 2000, pp:379-381 [Conf ] Sami J. Habib , Alice C. Parker i-CAD: A Rapid Prototyping CAD Tool for Intranet Design. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2003, pp:16-0 [Conf ] Dong-Hyun Heo , Alice C. Parker , C. P. Ravikumar Rapid Synthesis of Multi-Chip Systems. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1997, pp:62-68 [Conf ] Dong-Hyun Heo , Alice C. Parker , C. P. Ravikumar An Evolutionary Approach to System Redesign. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1998, pp:359-0 [Conf ] Suhrid A. Wadekar , Alice C. Parker , C. P. Ravikumar Freedom: Statistical Behavioral Estimation of System Energy and Power. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1998, pp:30-36 [Conf ] Sami J. Habib , Alice C. Parker , Daniel C. Lee Automated design of hierarchical intranets. [Citation Graph (0, 0)][DBLP ] Computer Communications, 2002, v:25, n:11-12, pp:1066-1075 [Journal ] William E. Burr , Dennis R. Allison , Alice C. Parker , Charles B. Silio Jr. , A. Brinton Cooper Bus System for the Military Computer Family. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 1979, v:12, n:4, pp:11-22 [Journal ] Louis J. Hafer , Alice C. Parker Automated Synthesis of Digital Hardware. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1982, v:31, n:2, pp:93-109 [Journal ] Michael C. McFarland , Alice C. Parker An Abstract Model of Behavior for Hardware Descriptions. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1983, v:32, n:7, pp:621-637 [Journal ] Nohbyung Park , Alice C. Parker Theory of Clocking for Maximum Execution Overlap of High-Speed Digital Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1988, v:37, n:6, pp:678-690 [Journal ] Alice C. Parker , John J. Wallace SLIDE: An I/O Hardware Descriptive Language. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1981, v:30, n:6, pp:423-439 [Journal ] Louis J. Hafer , Alice C. Parker A Formal Method for the Specification, Analysis, and Design of Register-Transfer Level Digital Logic. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:1, pp:4-18 [Journal ] Rajiv Jain , Alice C. Parker , Nohbyung Park Predicting system-level area and delay for pipelined and nonpipelined designs. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:8, pp:955-965 [Journal ] David W. Knapp , Alice C. Parker The ADAM design planning engine. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:7, pp:829-846 [Journal ] Fadi J. Kurdahi , Alice C. Parker Techniques for area estimation of VLSI layouts. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:1, pp:81-92 [Journal ] Andrew W. Nagle , Richard J. Cloutier , Alice C. Parker Synthesis of Hardware for the Control of Digital Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:4, pp:201-212 [Journal ] Nohbyung Park , Alice C. Parker Sehwa: a software package for synthesis of pipelines from behavioral specifications. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:3, pp:356-370 [Journal ] Sarma Sastry , Alice C. Parker Stochastic Models for Wireability Analysis of Gate Arrays. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:1, pp:52-65 [Journal ] Suhrid A. Wadekar , Alice C. Parker Interconnect-based system-level energy and power prediction to guide architecture exploration. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2004, v:12, n:4, pp:373-380 [Journal ] Kayhan Küçükçakar , Alice C. Parker A methodology and design tools to support system-level VLSI design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1995, v:3, n:3, pp:355-369 [Journal ] Microprogramming: the challenges of VLSI. [Citation Graph (, )][DBLP ] Search in 0.462secs, Finished in 0.464secs