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Doris Schmitt-Landsiedel: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jürgen Fischer, Philip Teichmann, Doris Schmitt-Landsiedel
    Scaling trends in adiabatic logic. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:427-434 [Conf]
  2. Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel
    Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:414-420 [Conf]
  3. Eric Liau, Doris Schmitt-Landsiedel
    Computational Intelligence Characterization Method of Semiconductor Device. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:456-461 [Conf]
  4. Jürgen Fischer, Philip Teichmann, Ettore Amirante, Doris Schmitt-Landsiedel
    Energieoptimierung durch Adiabatische Schaltungstechnik. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (1), 2005, pp:446- [Conf]
  5. S. R. Kadivar, Doris Schmitt-Landsiedel, H. Klar
    A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:554-561 [Conf]
  6. Alexander Frey, Martin Jenkner, Meinrad Schienle, Christian Paulus, Birgit Holzapfl, Petra Schindler-Bauer, Franz Hofmann, D. Kuhlmeier, J. Krause, J. Albers, W. Gumbrecht, Doris Schmitt-Landsiedel, Roland Thewes
    Design of an integrated potentiostat circuit for CMOS bio sensor chips. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:9-12 [Conf]
  7. Thomas Nirschl, Peng-Fei Wang, Walter Hansch, Doris Schmitt-Landsiedel
    The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2004, pp:713-716 [Conf]
  8. Jörg Sauerbrey, M. Wittig, Doris Schmitt-Landsiedel, Roland Thewes
    0.65V sigma-delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:1021-1024 [Conf]
  9. T. Tille, Jörg Sauerbrey, Doris Schmitt-Landsiedel
    A low-voltage MOSFET-only Sigma-Delta modulator for speech band applications using depletion-mode MOS-capacitors in combined series and parallel compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:376-379 [Conf]
  10. M. Eisele, Jörg Berthold, Doris Schmitt-Landsiedel, R. Mahnkopf
    The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:237-242 [Conf]
  11. Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
    Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:392-401 [Conf]
  12. Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
    Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:789-798 [Conf]
  13. Jürgen Fischer, Ettore Amirante, Agnese Bargagli-Stoffi, Philip Teichmann, Dominik Gruber, Doris Schmitt-Landsiedel
    Power Supply Net for Adiabatic Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:413-422 [Conf]
  14. Jürgen Fischer, Ettore Amirante, Francesco Randazzo, Giuseppe Iannaccone, Doris Schmitt-Landsiedel
    Reduction of the Energy Consumption in Adiabatic Gates by Optimal Transistor Sizing. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:309-318 [Conf]
  15. Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel
    Power-Clock Gating in Adiabatic Logic Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:638-646 [Conf]
  16. Stephan Henzler, Markus Koban, Doris Schmitt-Landsiedel, Jörg Berthold, Georg Georgakos
    Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:246-251 [Conf]
  17. Bernhard Hoppe, Gerd Neuendorf, Doris Schmitt-Landsiedel, J. Will Specks
    Optimization of high-speed CMOS logic circuits with analytical models for signal delay, chip area, and dynamic power dissipation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:3, pp:236-247 [Journal]
  18. Alessandro Castellazzi, R. Kraus, N. Seliger, Doris Schmitt-Landsiedel
    Reliability analysis of power MOSFET's with the help of compact models and circuit simulation. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:9-11, pp:1605-1610 [Journal]
  19. Alessandro Castellazzi, V. Kartal, R. Kraus, N. Seliger, M. Honsberg-Riedl, Doris Schmitt-Landsiedel
    Hot-Spot Meaurements and Analysis of Electro-Thermal Effects in Low-Voltage Power-MOSFET's. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:9-11, pp:1877-1882 [Journal]
  20. Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger
    Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1249-1252 [Conf]
  21. Eric Liau, Doris Schmitt-Landsiedel
    Computational Intelligence Characterization Method of Semiconductor Device [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  22. M. Eisele, Jörg Berthold, Doris Schmitt-Landsiedel, R. Mahnkopf
    The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:4, pp:360-368 [Journal]

  23. Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. [Citation Graph (, )][DBLP]


  24. CMOS sensor array for electrical imaging of neuronal activity. [Citation Graph (, )][DBLP]


  25. Latched CMOS DRAM Sense Amplifier Yield Analysis and Optimization. [Citation Graph (, )][DBLP]


  26. A Design Space Comparison of 6T and 8T SRAM Core-Cells. [Citation Graph (, )][DBLP]


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