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Leandro Soares Indrusiak:
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Publications of Author
- Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan
Reconfigurable platforms for ubiquitous computing. [Citation Graph (0, 0)][DBLP] Conf. Computing Frontiers, 2004, pp:377-389 [Conf]
- Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis
Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments. [Citation Graph (0, 0)][DBLP] DATE, 2002, pp:1130- [Conf]
- Leandro Soares Indrusiak, Florian Lubitz, Ricardo Augusto da Luz Reis, Manfred Glesner
Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:10940-10945 [Conf]
- Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis
Distributed Collaborative Design over Cave2 Framework. [Citation Graph (0, 0)][DBLP] VLSI-SOC, 2001, pp:97-108 [Conf]
- José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes
Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. [Citation Graph (0, 0)][DBLP] ISVLSI, 2006, pp:426-427 [Conf]
- Romualdo Begale Prudencio, Leandro Soares Indrusiak, Manfred Glesner
An Efficient Hardware Implementation of a Self-Adaptable Equalizer for WCDMA Downlink UMTS Standard. [Citation Graph (0, 0)][DBLP] ISVLSI, 2006, pp:77-84 [Conf]
- José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis
Inserting Data Encoding Techniques into NoC-Based Systems. [Citation Graph (0, 0)][DBLP] ISVLSI, 2007, pp:299-304 [Conf]
- Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, Giuliana Alcántara, Stefan Hoermann, Ralf Steinmetz
Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. [Citation Graph (0, 0)][DBLP] MSE, 2003, pp:57-58 [Conf]
- Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak
Microelectronics Education Using WWW. [Citation Graph (0, 0)][DBLP] MSE, 1999, pp:43-44 [Conf]
- Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak
VRML and Microelectronics Education. [Citation Graph (0, 0)][DBLP] MSE, 1999, pp:84-85 [Conf]
- Diego Fernando Jimenez Orostegui, Leandro Soares Indrusiak, Manfred Glesner
Proxy-Based Integration of Reconfigurable Hardware Within Simulation Environments: Improving E-Learning Experience in Microelectronics. [Citation Graph (0, 0)][DBLP] MSE, 2005, pp:59-60 [Conf]
- José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis
Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:603-613 [Conf]
- Kurt Franz Ackermann, Friedhelm Mayer, Leandro Soares Indrusiak, Manfred Glesner
Adaptable Image Processing System based on FPGA Modular Multi Kernel Instantiations. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2006, pp:183-188 [Conf]
- Hua Zhong, Leandro Soares Indrusiak, Heiko Hinkelmann, Manfred Glesner
Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2006, pp:160-167 [Conf]
- Leandro Soares Indrusiak, Manfred Glesner
Experiences on Actor-oriented Design of Reconfigurable Systems. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2005, pp:79-84 [Conf]
- Leandro Soares Indrusiak, Romualdo Begale Prudencio, Manfred Glesner
Modeling and Prototyping of Communication Systems Using Java: A Case Study. [Citation Graph (0, 0)][DBLP] IEEE International Workshop on Rapid System Prototyping, 2005, pp:225-231 [Conf]
- Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. [Citation Graph (0, 0)][DBLP] SAMOS, 2005, pp:12-21 [Conf]
- Elvio Dutra, Leandro Soares Indrusiak, Manfred Glesner
Non-linear addressing scheme for a lookup-based transformation function in a reconfigurable noise generator. [Citation Graph (0, 0)][DBLP] SBCCI, 2005, pp:242-247 [Conf]
- Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis
Accurate capture of timing parameters in inductively-coupled on-chip interconnects. [Citation Graph (0, 0)][DBLP] SBCCI, 2004, pp:117-122 [Conf]
- Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis
Lookup-based Remote Laboratory for FPGA Digital Design Prototyping. [Citation Graph (0, 0)][DBLP] VIRTUAL-LAB, 2004, pp:3-11 [Conf]
- Leandro Soares Indrusiak, Ricardo A. L. Reis, Manfred Glesner
Um Framework de Apoio à Colaboração no Projeto Distribuído de Sistemas Integrados. [Citation Graph (0, 0)][DBLP] RITA, 2004, v:11, n:2, pp:49-74 [Journal]
- Leandro Soares Indrusiak, Andreas Thuy, Manfred Glesner
Interactive presentation: Executable system-level specification models containing UML-based behavioral patterns. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:301-306 [Conf]
- Heiko Hinkelmann, Andreas Gunberg, Peter Zipf, Leandro Soares Indrusiak, Manfred Glesner
Multitasking Support for Dynamically Reconfig Urable Systems. [Citation Graph (0, 0)][DBLP] FPL, 2006, pp:1-6 [Conf]
- Kurt Franz Ackermann, Leandro Soares Indrusiak, Manfred Glesner
System Level Design of a Dynamically Self-Reconfigurable Image Processing System. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2007, pp:47-54 [Conf]
- Leandro Soares Indrusiak, Ricardo Augusto da Luz Reis
3D integrated circuit layout visualization using VRML. [Citation Graph (0, 0)][DBLP] Future Generation Comp. Syst., 2001, v:17, n:5, pp:503-511 [Journal]
An Actor-Oriented Group Mobility Model for Wireless Ad Hoc Sensor Networks. [Citation Graph (, )][DBLP]
TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor. [Citation Graph (, )][DBLP]
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. [Citation Graph (, )][DBLP]
PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels. [Citation Graph (, )][DBLP]
Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models. [Citation Graph (, )][DBLP]
A simplified executable model to evaluate latency and throughput of networks-on-chip. [Citation Graph (, )][DBLP]
A high abstraction, high accuracy power estimation model for networks-on-chip. [Citation Graph (, )][DBLP]
Validation of executable application models mapped onto network-on-chip platforms. [Citation Graph (, )][DBLP]
Enabling self-reconfiguration on a video processing platform. [Citation Graph (, )][DBLP]
Applying Communication Patterns to Actor-Oriented Models. [Citation Graph (, )][DBLP]
Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models. [Citation Graph (, )][DBLP]
An Actor-Oriented Model-Based Design Flow for Systems-on-Chip. [Citation Graph (, )][DBLP]
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