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Publications of Author

1. Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz
   Automated generation of layout and control for quantum circuits. [Citation Graph (0, 0)][DBLP]
   Conf. Computing Frontiers, 2007, pp:83-94 [Conf]
   
2. Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
   HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform. [Citation Graph (0, 0)][DBLP]
   CODES, 2002, pp:151-156 [Conf]
   
3. Nicholas Weaver, Yury Markovskiy, Yatish Patel, John Wawrzynek
   Post-placement C-slow retiming for the xilinx virtex FPGA. [Citation Graph (0, 0)][DBLP]
   FPGA, 2003, pp:185-194 [Conf]
   
4. Victor Wen, Mark Whitney, Yatish Patel, John Kubiatowicz
   Exploiting Prediction to Reduce Power on Buses. [Citation Graph (0, 0)][DBLP]
   HPCA, 2004, pp:2-13 [Conf]
   
5. Nemanja Isailovic, Yatish Patel, Mark Whitney, John Kubiatowicz
   Interconnection Networks for Scalable Quantum Computers. [Citation Graph (0, 0)][DBLP]
   ISCA, 2006, pp:366-377 [Conf]
   
6. Nemanja Isailovic, Mark Whitney, Yatish Patel, John Kubiatowicz, Dean Copsey, Frederic T. Chong, Isaac L. Chuang, Mark Oskin
   Datapath and control for quantum wires. [Citation Graph (0, 0)][DBLP]
   TACO, 2004, v:1, n:1, pp:34-61 [Journal]
   
7. 
   Running a Quantum Circuit at the Speed of Data. [Citation Graph (, )][DBLP]
   
   
8. 
   A fault tolerant, area efficient architecture for Shor's factoring algorithm. [Citation Graph (, )][DBLP]
   
   
9. 
   Using adaptive routing to compensate for performance heterogeneity. [Citation Graph (, )][DBLP]