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Heidi E. Ziegler: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Byoungro So, Mary W. Hall, Heidi E. Ziegler
    Custom Data Layout for Memory Parallelism. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:291-302 [Conf]
  2. Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
    Compiler-generated communication for pipelined FPGA applications. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:610-615 [Conf]
  3. Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro C. Diniz
    Coarse-Grain Pipelining on Multiple FPGA Architectures. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:77-0 [Conf]
  4. Heidi E. Ziegler, Mary W. Hall
    Evaluating heuristics in automatically mapping multi-loop applications to FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:184-195 [Conf]
  5. Heidi E. Ziegler
    Automated Mapping of Coarse-Grain Pipelined Applications to FPGA Systems. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:1176-1177 [Conf]
  6. Kiran Bondalapati, Pedro C. Diniz, Phillip Duncan, John J. Granacki, Mary W. Hall, Rajeev Jain, Heidi E. Ziegler
    DEFACTO: A Design Environment for Adaptive Computing Technology. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:570-578 [Conf]
  7. Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler
    Bridging the Gap between Compilation and Synthesis in the DEFACTO System. [Citation Graph (0, 0)][DBLP]
    LCPC, 2001, pp:52-70 [Conf]
  8. Heidi E. Ziegler, Mary W. Hall, Byoungro So
    Search Space Properties for Mapping Coarse-Grain Pipelined FPGA Applications. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:1-16 [Conf]
  9. Heidi E. Ziegler, Priyadarshini L. Malusare, Pedro C. Diniz
    Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:62-75 [Conf]
  10. Christopher Ho, Heidi E. Ziegler, Michel Dubois
    In-Memory Directories: Eliminating the Cost of Directories in CC-NUMAs. [Citation Graph (0, 0)][DBLP]
    SPAA, 1998, pp:222-230 [Conf]
  11. Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler
    Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:2-3, pp:51-62 [Journal]

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