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Publications of Author

1. David Wentzlaff, Anant Agarwal
   Constructing Virtual Architectures on a Tiled Processor. [Citation Graph (0, 0)][DBLP]
   CGO, 2006, pp:173-184 [Conf]
   
2. David Wentzlaff, Anant Agarwal
   A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation. [Citation Graph (0, 0)][DBLP]
   FCCM, 2004, pp:289-290 [Conf]
   
3. Michael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
   Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. [Citation Graph (0, 0)][DBLP]
   ISCA, 2004, pp:2-13 [Conf]
   
4. Jason Sungtae Kim, Michael Bedford Taylor, Jason E. Miller, David Wentzlaff
   Energy characterization of a tiled architecture processor with on-chip networks. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2003, pp:424-427 [Conf]
   
5. Michael Bedford Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
   The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2002, v:22, n:2, pp:25-35 [Journal]
   
6. David Wentzlaff, Patrick Griffin, Henry Hoffmann, Liewei Bao, Bruce Edwards, Carl Ramey, Matthew Mattina, Chyi-Chang Miao, John F. Brown III, Anant Agarwal
   On-Chip Interconnection Architecture of the Tile Processor. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2007, v:27, n:5, pp:15-31 [Journal]
   
7. 
   Remote Store Programming. [Citation Graph (, )][DBLP]
   
   
8. 
   An operating system for multicore and clouds: mechanisms and implementation. [Citation Graph (, )][DBLP]