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Bratin Saha: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, Ali-Reza Adl-Tabatabai
    Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:34-48 [Conf]
  2. Valery Trifonov, Bratin Saha, Zhong Shao
    Fully reflexive intensional type analysis. [Citation Graph (0, 0)][DBLP]
    ICFP, 2000, pp:82-93 [Conf]
  3. Richard L. Hudson, Bratin Saha, Ali-Reza Adl-Tabatabai, Ben Hertzberg
    McRT-Malloc: a scalable transactional memory allocator. [Citation Graph (0, 0)][DBLP]
    ISMM, 2006, pp:74-83 [Conf]
  4. Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn Jacobson
    Architectural Support for Software Transactional Memory. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:185-196 [Conf]
  5. Ali-Reza Adl-Tabatabai, Brian T. Lewis, Vijay Menon, Brian R. Murphy, Bratin Saha, Tatiana Shpeisman
    Compiler and runtime support for efficient software transactional memory. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:26-37 [Conf]
  6. Stefan Monnier, Bratin Saha, Zhong Shao
    Principled Scavenging. [Citation Graph (0, 0)][DBLP]
    PLDI, 2001, pp:81-91 [Conf]
  7. Zhong Shao, Bratin Saha, Valery Trifonov, Nikolaos Papaspyrou
    A type system for certified binaries. [Citation Graph (0, 0)][DBLP]
    POPL, 2002, pp:217-232 [Conf]
  8. Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hudson, Chi Cao Minh, Ben Hertzberg
    McRT-STM: a high performance software transactional memory system for a multi-core runtime. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2006, pp:187-197 [Conf]
  9. Ali-Reza Adl-Tabatabai, Christos Kozyrakis, Bratin Saha
    Transactional programming in a multi-core environment. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2007, pp:272- [Conf]
  10. Yang Ni, Vijay Menon, Ali-Reza Adl-Tabatabai, Antony L. Hosking, Richard L. Hudson, J. Eliot B. Moss, Bratin Saha, Tatiana Shpeisman
    Open nesting in software transactional memory. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2007, pp:68-78 [Conf]
  11. Bratin Saha, Zhong Shao
    Optimal Type Lifting. [Citation Graph (0, 0)][DBLP]
    Types in Compilation, 1998, pp:156-177 [Conf]
  12. Ali-Reza Adl-Tabatabai, Christos Kozyrakis, Bratin Saha
    Unlocking concurrency. [Citation Graph (0, 0)][DBLP]
    ACM Queue, 2006, v:4, n:10, pp:24-33 [Journal]
  13. Bratin Saha, Valery Trifonov, Zhong Shao
    Intensional analysis of quantified types. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2003, v:25, n:2, pp:159-209 [Journal]
  14. Zhong Shao, Valery Trifonov, Bratin Saha, Nikolaos Papaspyrou
    A type system for certified binaries. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2005, v:27, n:1, pp:1-45 [Journal]
  15. Tatiana Shpeisman, Vijay Menon, Ali-Reza Adl-Tabatabai, Steven Balensiefer, Dan Grossman, Richard L. Hudson, Katherine F. Moore, Bratin Saha
    Enforcing isolation and ordering in STM. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:78-88 [Conf]
  16. Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghuloum, Mohan Rajagopalan, Richard L. Hudson, Leaf Petersen, Vijay Menon, Brian R. Murphy, Tatiana Shpeisman, Eric Sprangle, Anwar Rohillah, Doug Carmean, Jesse Fang
    Enabling scalability and performance in a large scale CMP environment. [Citation Graph (0, 0)][DBLP]
    EuroSys, 2007, pp:73-86 [Conf]

  17. Terascale chip multiprocessor memory hierarchy and programming model. [Citation Graph (, )][DBLP]

  18. Model Checking Transactional Memory with Spin. [Citation Graph (, )][DBLP]

  19. Design and implementation of transactional constructs for C/C++. [Citation Graph (, )][DBLP]

  20. Programming model for a heterogeneous x86 platform. [Citation Graph (, )][DBLP]

  21. Model checking transactional memory with spin. [Citation Graph (, )][DBLP]

  22. Concurrent GC leveraging transactional memory. [Citation Graph (, )][DBLP]

  23. Practical weak-atomicity semantics for java stm. [Citation Graph (, )][DBLP]

  24. Kicking the tires of software transactional memory: why the going gets tough. [Citation Graph (, )][DBLP]

  25. Irrevocable transactions and their applications. [Citation Graph (, )][DBLP]

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