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Andrew K. Martin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham, Magdy S. Abadir
    Using Abstract Specifications to Verify PowerPCTM Custom Memories by Symbolic Trajectory Evaluation. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:386-402 [Conf]
  2. Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
    Validation of PowerPC(tm) Custom Memories using Symbolic Simulation. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:9-14 [Conf]
  3. Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham
    Design and Development Paradigm for Industrial Formal Verification CAD Tools. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:4, pp:26-35 [Journal]
  4. Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
    Validating PowerPC Microprocessor Custom Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:4, pp:61-76 [Journal]
  5. Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin
    Formal Verification Successes at Motorola. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2003, v:22, n:2, pp:117-123 [Journal]
  6. Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham
    A Formal Framework for Verification of Embedded Custom Memories of the Motorola MPC7450 Microprocessor. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2005, v:27, n:1-2, pp:67-112 [Journal]
  7. Wendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada
    Limited switch dynamic logic circuits for high-speed low-power circuit design. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2006, v:50, n:2-3, pp:277-286 [Journal]

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