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Dirk Eisenbiegler:
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- Dirk Eisenbiegler, Ramayya Kumar
Formally embedding existing high level synthesis algorithms. [Citation Graph (0, 0)][DBLP] CHARME, 1995, pp:71-83 [Conf]
- Christian Blumenröhr, Dirk Eisenbiegler
Performing High-Level Synthesis via Program Transformations within a Theorem Prover. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1998, pp:10034-10037 [Conf]
- Ramayya Kumar, Christian Blumenröhr, Dirk Eisenbiegler, Detlef Schmid
Formal Synthesis in Circuit Design - A Classification and Survey. [Citation Graph (0, 0)][DBLP] FMCAD, 1996, pp:294-309 [Conf]
- Christian Blumenröhr, Dirk Eisenbiegler
An Efficient Representation for Formal Synthesis. [Citation Graph (0, 0)][DBLP] ISSS, 1997, pp:9-15 [Conf]
- Dirk Eisenbiegler, Christian Blumenröhr, Ramayya Kumar
Implementation Issues About the Embedding of Existing High Level Synthesis Algorithms in HOL. [Citation Graph (0, 0)][DBLP] TPHOLs, 1996, pp:157-172 [Conf]
- Dirk Eisenbiegler, Ramayya Kumar
An Automata Theory Dedicated towards Formal Circuit Synthesis. [Citation Graph (0, 0)][DBLP] TPHOLs, 1995, pp:154-169 [Conf]
- Dirk Eisenbiegler, Klaus Schneider, Ramayya Kumar
A Functional Approach for Formalizing Regular Hardware Structures. [Citation Graph (0, 0)][DBLP] HUG, 1993, pp:101-114 [Conf]
- Christian Blumenröhr, Dirk Eisenbiegler, Detlef Schmid
On the efficiency of formal synthesis-experimental results. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:1, pp:25-32 [Journal]
A constructive approach towards correctness of synthesis-application within retiming. [Citation Graph (, )][DBLP]
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