The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Elena Teica: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rajesh Radhakrishnan, Elena Teica, Ranga Vemuri
    Verification of Basic Block Schedules Using RTL Transformations. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:173-178 [Conf]
  2. Elena Teica, Rajesh Radhakrishnan, Ranga Vemuri
    On the verification of synthesized designs using automatically generated transformational witnesses. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:798- [Conf]
  3. Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri
    Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2001, v:19, n:3, pp:237-273 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002