The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Jürgen Ruf: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jürgen Ruf, Thomas Kropf
    Symbolic model checking for a discrete clocked temporal logic with intervals. [Citation Graph (0, 0)][DBLP]
    CHARME, 1997, pp:146-163 [Conf]
  2. Jürgen Ruf, Thomas Kropf
    Modleing and Checking Networks of Communicating Real-Time Process. [Citation Graph (0, 0)][DBLP]
    CHARME, 1999, pp:265-279 [Conf]
  3. Prakash M. Peranandam, Pradeep K. Nalla, Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel
    Fast falsification based on symbolic bounded property checking. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:1077-1082 [Conf]
  4. Jürgen Ruf, Dirk W. Hoffmann, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Wolfgang Müller 0003
    The simulation semantics of systemC. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:64-70 [Conf]
  5. Jürgen Ruf, Dirk W. Hoffmann, Thomas Kropf, Wolfgang Rosenstiel
    Simulation-guided property checking based on a multi-valued AR-automata. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:742-748 [Conf]
  6. Jürgen Ruf, Thomas Kropf
    Analyzing Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:243-0 [Conf]
  7. Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel
    Modeling and Formal Verification of Production Automation Systems. [Citation Graph (0, 0)][DBLP]
    SoftSpez Final Report, 2004, pp:541-566 [Conf]
  8. Stephan Flake, Wolfgang Müller 0003, Ulrich Pape, Jürgen Ruf
    Specification and Formal Verification of Temporal Properties of Production Automation Systems. [Citation Graph (0, 0)][DBLP]
    SoftSpez Final Report, 2004, pp:206-226 [Conf]
  9. Jürgen Ruf, Thomas Kropf
    Formal Data Analysis of Timed Finite State Systems. [Citation Graph (0, 0)][DBLP]
    ECRTS, 2002, pp:257-0 [Conf]
  10. Dirk W. Hoffmann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
    Simulation Meets Verification: Checking Temporal Properties in SystemC. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1435-0 [Conf]
  11. Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer
    Do You Trust Your Model Checker? [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:179-196 [Conf]
  12. Jürgen Ruf, Thomas Kropf
    Using MTBDDs for Compostion and Model Checking of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1998, pp:185-202 [Conf]
  13. Jürgen Ruf, Thomas Kropf
    A New Algorithm for Discrete Timed Symbolic Model Checking. [Citation Graph (0, 0)][DBLP]
    HART, 1997, pp:18-32 [Conf]
  14. Jürgen Ruf, Thomas Kropf, Jochen Klose
    A Visual Approach to Validating System Level Designs. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:186-191 [Conf]
  15. Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
    Coverage Driven Verification applied to Embedded Software. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:159-164 [Conf]
  16. Stephan Flake, Christian Geiger, Wolfgang Müller 0003, Volker Paelke, Waldemar Rosenbach, Jürgen Ruf
    Customer-Oriented Systems Design through Virtual Prototypes. [Citation Graph (0, 0)][DBLP]
    WETICE, 2001, pp:263-268 [Conf]
  17. Pradeep K. Nalla, Roland J. Weiss, Prakash M. Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
    Distributed Symbolic Bounded Property Checking. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2006, v:135, n:2, pp:47-63 [Journal]
  18. Jürgen Ruf, Thomas Kropf
    Symbolic Verification and Analysis of Discrete Timed Systems. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2003, v:23, n:1, pp:67-108 [Journal]
  19. Jürgen Ruf
    RAVEN: Real-Time Analyzing and Verification Environment. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:1, pp:89-104 [Journal]
  20. Andreas Krebs, Jürgen Ruf
    Optimized Temporal Logic Compilation. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2003, v:9, n:2, pp:120-137 [Journal]
  21. Wolfgang Reif, Gerhard Schellhorn, Tobias Vollmer, Jürgen Ruf
    Correctness of Efficient Real-Time Model Checking. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:2, pp:194-209 [Journal]

  22. Verification of Temporal Properties in Automotive Embedded Software. [Citation Graph (, )][DBLP]


  23. Using MTBDDs for discrete timed symbolic model checking. [Citation Graph (, )][DBLP]


  24. Semiformal verification of temporal properties in automotive hardware dependent software. [Citation Graph (, )][DBLP]


  25. Towards assertion-based verification of heterogeneous system designs. [Citation Graph (, )][DBLP]


  26. Grid Based Fast Falsification For Bounded Property Checking. [Citation Graph (, )][DBLP]


  27. Efficient and Customizable Integration of Temporal Properties. [Citation Graph (, )][DBLP]


  28. Using Symbolic Simulation for Bounded Property Checking. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.303secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002