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Julien Schmaltz: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ghiath Al Sammane, Diana Toma, Julien Schmaltz, Pierre Ostier, Dominique Borrione
    Constrained Symbolic Simulation with Mathematica and ACL2. [Citation Graph (0, 0)][DBLP]
    CHARME, 2003, pp:150-157 [Conf]
  2. Julien Schmaltz, Dominique Borrione
    A Functional Approach to the Formal Specification of Networks on Chip. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2004, pp:52-66 [Conf]
  3. Julien Schmaltz
    A Formal Model of Lower System Layers. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2006, pp:191-192 [Conf]
  4. Ghiath Al Sammane, Julien Schmaltz, Diana Toma, Pierre Ostier, Dominique Borrione
    TheoSim: combining symbolic simulation and theorem proving for hardware verification. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:60-65 [Conf]
  5. Julien Schmaltz, Dominique Borrione
    A Generic Network on Chip Model. [Citation Graph (0, 0)][DBLP]
    TPHOLs, 2005, pp:310-325 [Conf]
  6. Julien Schmaltz, Dominique Borrione
    Towards a formal theory of on chip communications in the ACL2 logic. [Citation Graph (0, 0)][DBLP]
    ACL2, 2006, pp:47-56 [Conf]
  7. Dominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz
    A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. [Citation Graph (0, 0)][DBLP]
    NOCS, 2007, pp:127-136 [Conf]

  8. Formalizing On Chip Communications in a Functional Style. [Citation Graph (, )][DBLP]


  9. Formal specification of networks-on-chips: deadlock and evacuation. [Citation Graph (, )][DBLP]


  10. Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  11. A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware. [Citation Graph (, )][DBLP]


  12. Towards a formally verified network-on-chip. [Citation Graph (, )][DBLP]


  13. On Conformance Testing for Timed Systems. [Citation Graph (, )][DBLP]


  14. Executable formal specification and validation of NoC communication infrastructures. [Citation Graph (, )][DBLP]


  15. Model-Based Testing of Electronic Passports. [Citation Graph (, )][DBLP]


  16. A Formal Proof of a Necessary and Sufficient Condition for Deadlock-Free Adaptive Networks. [Citation Graph (, )][DBLP]


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