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Klaus Buchenrieder: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Klaus Buchenrieder, Alexander Sedlmeier, Christian Veith
    HW/SW Co-Design with PRAMs Using CoDES. [Citation Graph (0, 0)][DBLP]
    CHDL, 1993, pp:65-78 [Conf]
  2. Josef Fleischmann, Klaus Buchenrieder, Rainer Kress
    A hardware/software prototyping environment for dynamically reconfigurable embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:105-109 [Conf]
  3. Josef Fleischmann, Klaus Buchenrieder, Rainer Kress
    Java Driven Codesign and Prototyping of Networked Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:794-797 [Conf]
  4. Klaus Buchenrieder, Andreas Pyttel, Alexander Sedlmeier
    A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:870-874 [Conf]
  5. Josef Fleischmann, Klaus Buchenrieder, Rainer Kress
    Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:768-769 [Conf]
  6. Michael Mrva, Klaus Buchenrieder, Rainer Kress
    A Scalable Architecture for Multi-threaded JAVA Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:868-874 [Conf]
  7. Robert Fischer, Klaus Buchenrieder, Ulrich Nageldinger
    Reducing the Power Consumption of FPGAs through Retiming. [Citation Graph (0, 0)][DBLP]
    ECBS, 2005, pp:89-94 [Conf]
  8. Stephan Schulz II, Jerzy W. Rozenblit, Klaus Buchenrieder
    Towards an application of model-based codesign: an autonomous, intelligent cruise controller. [Citation Graph (0, 0)][DBLP]
    ECBS, 1997, pp:73-80 [Conf]
  9. Dieter Monjau, Stefan Kahlert, Klaus Buchenrieder, Christian Veith
    A New Model-Based Approach to the Co-Design of Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    EUROCAST, 1993, pp:42-51 [Conf]
  10. Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier
    Integration of Reconfigurable Hardware into System-Level Design. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:987-996 [Conf]
  11. Klaus Buchenrieder
    Rapid Prototyping of Embedded Hardware/Software Systems. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:2-0 [Conf]
  12. Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier
    System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System Model. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2002, pp:115-121 [Conf]
  13. Josef Fleischmann, Klaus Buchenrieder
    Prototyping Networked Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1999, v:32, n:2, pp:116-119 [Journal]
  14. Stephan Schulz II, Jerzy W. Rozenblit, Michael Mrva, Klaus Buchenrieder
    Model-Based Codesign. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1998, v:31, n:8, pp:60-67 [Journal]
  15. Stephan Schulz II, Jerzy W. Rozenblit, Klaus Buchenrieder
    Multilevel Testing for Design Verification of Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:2, pp:60-69 [Journal]
  16. Klaus Buchenrieder
    Processing of Myoelectric Signals by Feature Selection and Dimensionality Reduction for the Control of Powered Upper-Limb Prostheses. [Citation Graph (0, 0)][DBLP]
    EUROCAST, 2007, pp:1057-1065 [Conf]
  17. Rainer Scholz, Klaus Buchenrieder
    Self Reconfiguring EPIC Soft Core Processors. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:182-186 [Conf]

  18. Generation of Related Performance Simulation Models at an Early Stage in the Design Cycle. [Citation Graph (, )][DBLP]


  19. Dimensionality Reduction for the Control of Powered Upper Limb Prostheses. [Citation Graph (, )][DBLP]


  20. Communication Modeling for System-Level Performance-Simulation. [Citation Graph (, )][DBLP]


  21. Transforming UML-Based System Descriptions into Simulation Models as Part of System Development Frameworks. [Citation Graph (, )][DBLP]


  22. Dynamic Behavior of Time-Domain Features for Prosthesis Control. [Citation Graph (, )][DBLP]


  23. A prototyping environment for control-oriented HW/SW systems using state-charts, activity-charts and FPGA's. [Citation Graph (, )][DBLP]


  24. Generating MARTE Allocation Models from Activity Threads. [Citation Graph (, )][DBLP]


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