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Publications of Author

1. Lejla Batina, David Hwang, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede
   Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. [Citation Graph (0, 0)][DBLP]
   CHES, 2005, pp:106-118 [Conf]
   
2. Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede
   Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. [Citation Graph (0, 0)][DBLP]
   CHES, 2005, pp:354-365 [Conf]
   
3. David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede
   Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:60-65 [Conf]
   
4. Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede
   A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. [Citation Graph (0, 0)][DBLP]
   DAC, 2005, pp:222-227 [Conf]
   
5. Alireza Hodjat, Ingrid Verbauwhede
   A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA. [Citation Graph (0, 0)][DBLP]
   FCCM, 2004, pp:308-309 [Conf]
   
6. Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede
   A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:60-63 [Conf]
   
7. Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, Ingrid Verbauwhede
   Embedded Software Integration for Coarse-Grain Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2004, pp:- [Conf]
   
8. Alireza Hodjat, Ingrid Verbauwhede
   Minimum Area Cost for a 30 to 70 Gbits/s AES Processor. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2004, pp:83-88 [Conf]
   
9. Herwin Chan, Alireza Hodjat, Jun Shi, Richard D. Wesel, Ingrid Verbauwhede
   Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network. [Citation Graph (0, 0)][DBLP]
   ITCC (2), 2004, pp:578-582 [Conf]
   
10. Alireza Hodjat, David Hwang, Ingrid Verbauwhede
    A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks. [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2005, pp:538-543 [Conf]
    
11. Alireza Hodjat, Patrick Schaumont, Ingrid Verbauwhede
    Architectural Design Features of a Programmable High Throughput AES Coprocessor. [Citation Graph (0, 0)][DBLP]
    ITCC (2), 2004, pp:498-502 [Conf]
    
12. Alireza Hodjat, Lejla Batina, David Hwang, Ingrid Verbauwhede
    HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:45-51 [Journal]
    
13. Alireza Hodjat, Ingrid Verbauwhede
    High-Throughput Programmable Cryptocoprocessor. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:3, pp:34-45 [Journal]
    
14. Alireza Hodjat, Ingrid Verbauwhede
    Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:366-372 [Journal]
    
15. Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede
    Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]