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Kuen Hung Tsoi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ocean Y. H. Cheung, Kuen Hung Tsoi, Philip Heng Wai Leong, M. P. Leong
    Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA. [Citation Graph (0, 0)][DBLP]
    CHES, 2001, pp:333-347 [Conf]
  2. M. P. Leong, Ocean Y. H. Cheung, Kuen Hung Tsoi, Philip Heng Wai Leong
    A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:122-131 [Conf]
  3. Kuen Hung Tsoi, Chun Hok Ho, H. C. Yeung, Philip Heng Wai Leong
    An Arithmetic Library and Its Application to the N-body Problem. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:68-78 [Conf]
  4. Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong
    A Massively Parallel RC4 Key Search Engine. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:13-21 [Conf]
  5. Kuen Hung Tsoi, K. H. Leung, Philip Heng Wai Leong
    Compact FPGA-based True and Pseudo Random Number Generators. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:51-61 [Conf]
  6. Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner
    Fly - A Modifiable Hardware Compiler. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:381-390 [Conf]
  7. Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred Glesner, Kong Pang Pun, Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong
    IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:526-535 [Conf]
  8. Kuen Hung Tsoi
    Computer Arithmetic Synthesis Technologies on Reconfigurable Platforms. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:713-714 [Conf]
  9. Kuen Hung Tsoi, Philip Heng Wai Leong
    Mullet - A Parallel Multiplier Generator. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:691-694 [Conf]
  10. G. L. Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, C. C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk
    Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:215-222 [Conf]

  11. Map-reduce as a Programming Model for Custom Computing Machines. [Citation Graph (, )][DBLP]


  12. Axel: a heterogeneous cluster with FPGAs and GPUs. [Citation Graph (, )][DBLP]


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